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IRF7807VPBF-1_15 Datasheet, PDF (4/9 Pages) International Rectifier – Industry-standard pinout SO-8 Package
IRF7807VTRPbF-1
For the synchronous MOSFET Q2, Rds(on) is an im-
portant characteristic; however, once again the im-
portance of gate charge must not be overlooked since
it impacts three critical areas. Under light load the
MOSFET must still be turned on and off by the con-
trol IC so the gate drive losses become much more
significant. Secondly, the output charge Qoss and re-
verse recovery charge Q both generate losses that
rr
are transfered to Q1 and increase the dissipation in
that device. Thirdly, gate charge will impact the
MOSFETs’ susceptibility to Cdv/dt turn on.
The drain of Q2 is connected to the switching node
of the converter and therefore sees transitions be-
tween ground and Vin. As Q1 turns on and off there is
a rate of change of drain voltage dV/dt which is ca-
pacitively coupled to the gate of Q2 and can induce
a voltage spike on the gate that is sufficient to turn
the MOSFET on, resulting in shoot-through current .
The ratio of Q /Q must be minimized to reduce the
gd gs1
potential for Cdv/dt turn on.
Spice model for IRF7807V can be downloaded in
machine readable format at www.irf.com.
Figure 2: Qoss Characteristic
Typical Mobile PC Application
The performance of these new devices has been tested
in circuit and correlates well with performance predic-
tions generated by the system models. An advantage of
this new technology platform is that the MOSFETs it
produces are suitable for both control FET and synchro-
nous FET applications. This has been demonstrated with
the 3.3V and 5V converters. (Fig 3 and Fig 4). In these
applications the same MOSFET IRF7807V was used for
both the control FET (Q1) and the synchronous FET
(Q2). This provides a highly effective cost/performance
solution.
3.3V Supply : Q1=Q2= IRF7807V
5.0V Supply : Q1=Q2= IRF7807V
93
95
92
94
91
93
90
92
89
91
88
87
86
Vin=24V
85
Vin=14V
84
Vin=10V
90
Vin=24V
89
Vin=14V
88
Vin=10V
87
83
86
1
2
3
4
5
Load current (A)
1
2
3
4
5
Load current (A)
Figure 3
Figure 4
4
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October 16, 2014