IRLR3103TRPBF Datasheet, PDF (2/11 Pages) International Rectifier – Logic-Level Gate Drive

IRLR/U3103PbF
Electrical Characteristics @ T_J = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
Conditions
V_(BR)DSS Drain-to-Source Breakdown Voltage
∆V_(BR)DSS/∆T_J Breakdown Voltage Temp. Coefficient
R_DS(on)
V_GS(th)
g_fs
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
I_DSS
Drain-to-Source Leakage Current
I_GSS
Q_g
Q_gs
Q_gd
t_d(on)
t_r
t_d(off)
t_f
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
L_D
Internal Drain Inductance
L_S
Internal Source Inductance
30 ––– ––– V V_GS = 0V, I_D = 250µA
––– 0.037 ––– V/°C Reference to 25°C, I_D = 1mA
–––
–––
––– 0.019
––– 0.024
Ω
V_GS = 10V, I_D = 33A „
V_GS = 4.5V, I_D = 25A „
1.0 ––– ––– V V_DS = V_GS, I_D = 250µA
23 ––– ––– S V_DS = 25V, I_D = 34A‡
––– ––– 25
––– ––– 250
µA ^{VDS = 30V, VGS = 0V}
V_DS = 18V, V_GS = 0V, T_J = 150°C
––– ––– 100 _nA V_GS = 16V
––– ––– -100
V_GS = -16V
––– ––– 50
I_D = 34A
––– ––– 14 nC V_DS = 24V
––– ––– 28
V_GS = 4.5V, See Fig. 6 and 13 „‡
––– 9.0 –––
V_DD = 15V
––– 210 –––
––– 20 –––
ns ^{ID = 34A}
R_G = 3.4Ω, V_GS = 4.5V
––– 54 –––
R_D = 0.43Ω, See Fig. 10 „‡
Between lead,
D
––– 4.5 ––– nH _{6mm (0.25in.)}
––– 7.5 –––
from package
G
and center of die contact†
S
C_iss
Input Capacitance
C_oss
Output Capacitance
C_rss
Reverse Transfer Capacitance
––– 1600 –––
––– 640 –––
––– 320 –––
V_GS = 0V
pF V_DS = 25V
ƒ = 1.0MHz, See Fig. 5‡
Source-Drain Ratings and Characteristics
Parameter
I_S
Continuous Source Current
(Body Diode)
ISM
Pulsed Source Current
(Body Diode) ‡
V_SD
Diode Forward Voltage
t_rr
Reverse Recovery Time
Q_rr
Reverse RecoveryCharge
t_on
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
MOSFET symbol
D
––– ––– 55… _{A showing the}
integral reverse
G
––– ––– 220
p-n junction diode.
S
––– ––– 1.3 V T_J = 25°C, I_S = 28A, V_GS = 0V „
––– 81 120 ns T_J = 25°C, I_F = 34A
––– 210 310 nC di/dt = 100A/µs „†
Intrinsic turn-on time is negligible (turn-on is dominated by L_S+L_D)
Notes:
 Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
‚ V_DD = 15V, starting T_J = 25°C, L = 300µH
R_G = 25Ω, I_AS = 34A. (See Figure 12)
ƒ I_SD ≤ 34A, di/dt ≤ 140A/µs, V_DD ≤ V_(BR)DSS,
T_J ≤ 175°C
„ Pulse width ≤ 300µs; duty cycle ≤ 2%
… Calculated continuous current based on maximum allowable junction
temperature; Package limitation current = 20A
† This is applied for I-PAK, L_S of D-PAK is measured between lead and
center of die contact
‡ Uses IRL3103 data and test conditions
** When mounted on 1" square PCB (FR-4 or G-10 Material ) .
For recommended footprint and soldering techniques refer to application note #AN-994
2
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