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IRFS3307ZPBF_15 Datasheet, PDF (2/11 Pages) International Rectifier – High Efficiency Synchronous Rectification in SMPS | |||
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IRFB/S/SL3307ZPbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
V(BR)DSS
ÎV(BR)DSS/ÎTJ
RDS(on)
VGS(th)
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
75 âââ
âââ 0.094
âââ 4.6
âââ
âââ
5.8
V VGS = 0V, ID = 250μA
d V/°C Reference to 25°C, ID = 5mA
g mΩ VGS = 10V, ID = 75A
2.0 âââ 4.0 V VDS = VGS, ID = 150μA
RG(int)
IDSS
IGSS
Internal Gate Resistance
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
âââ 0.70 âââ
âââ âââ 20
âââ âââ 250
âââ âââ 100
âââ âââ -100
Ω
μA VDS = 75V, VGS = 0V
VDS = 75V, VGS = 0V, TJ = 125°C
nA VGS = 20V
VGS = -20V
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
gfs
Forward Transconductance
320 âââ âââ
Qg
Total Gate Charge
Qgs
Gate-to-Source Charge
âââ 79 110
âââ 19 âââ
Qgd
Qsync
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
âââ 24 âââ
âââ 55 âââ
td(on)
Turn-On Delay Time
tr
Rise Time
âââ 15 âââ
âââ 64 âââ
td(off)
tf
Turn-Off Delay Time
Fall Time
âââ 38 âââ
âââ 65 âââ
Ciss
Input Capacitance
Coss
Output Capacitance
âââ 4750 âââ
âââ 420 âââ
Crss
Reverse Transfer Capacitance
âââ 190 âââ
i Coss eff. (ER) Effective Output Capacitance (Energy Related) âââ 440 âââ
h Coss eff. (TR) Effective Output Capacitance (Time Related)
âââ 410 âââ
S VDS = 50V, ID = 75A
nC ID = 75A
g VDS = 38V
VGS = 10V
ID = 75A, VDS =0V, VGS = 10V
ns VDD = 49V
ID = 75A
g RG = 2.6Ω
VGS = 10V
pF VGS = 0V
VDS = 50V
Æ = 1.0MHz
j VGS = 0V, VDS = 0V to 60V
h VGS = 0V, VDS = 0V to 60V
Diode Characteristics
Symbol
Parameter
IS
Continuous Source Current
(Body Diode)
ISM
Pulsed Source Current
Ãdi (Body Diode)
VSD
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
Reverse Recovery Current
ton
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
 âââ âââ 128 A MOSFET symbol
D
showing the
âââ âââ 512
integral reverse
G
p-n junction diode.
S
âââ âââ 1.3
g V TJ = 25°C, IS = 75A, VGS = 0V
âââ 33 50 ns TJ = 25°C
VR = 64V,
âââ 39 59
TJ = 125°C
âââ 42 63 nC TJ = 25°C
g IF = 75A
di/dt = 100A/μs
âââ 56 84
TJ = 125°C
âââ 2.2 âââ A TJ = 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Calculated continuous current based on maximum allowable junction  ISD ⤠75A, di/dt ⤠1570A/μs, VDD ⤠V(BR)DSS, TJ ⤠175°C.
temperature. Bond wire current limit is 120A. Note that current
Â
Pulse width ⤠400μs; duty cycle ⤠2%.
limitations arising from heating of the device leads may occur with  Coss eff. (TR) is a fixed capacitance that gives the same charging time
some lead mounting arrangements.
as Coss while VDS is rising from 0 to 80% VDSS.
 Repetitive rating; pulse width limited by max. junction
temperature.
 Limited by TJmax, starting TJ = 25°C, L = 0.050mH
 Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS.
 When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
RG = 25Ω, IAS = 75A, VGS =10V. Part not recommended for use
above this value.
mended footprint and soldering techniques refer to application note #AN-994.
 Rθ is measured at TJ approximately 90°C.
2
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