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IRFS3306PBF_15 Datasheet, PDF (2/12 Pages) International Rectifier – High Efficiency Synchronous Rectification in SMPS | |||
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IRFB3306PbF/IRFS3306PbF/IRFSL3306PbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
V(BR)DSS
Drain-to-Source Breakdown Voltage
ÎV(BR)DSS/ÎTJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
RG
Internal Gate Resistance
Min.
60
âââ
âââ
2.0
âââ
âââ
âââ
âââ
âââ
Typ.
âââ
0.07
3.3
âââ
âââ
âââ
âââ
âââ
0.7
Max. Units
Conditions
âââ
âââ
4.2
4.0
20
250
100
-100
âââ
V VGS = 0V, ID = 250μA
d V/°C Reference to 25°C, ID = 5mA
g mΩ VGS = 10V, ID = 75A
V VDS = VGS, ID = 150μA
μA VDS = 60V, VGS = 0V
VDS = 48V, VGS = 0V, TJ = 125°C
nA VGS = 20V
VGS = -20V
Ω
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min.
gfs
Forward Transconductance
230
Qg
Total Gate Charge
âââ
Qgs
Gate-to-Source Charge
âââ
Qgd
Gate-to-Drain ("Miller") Charge
âââ
Qsync
Total Gate Charge Sync. (Qg - Qgd)
âââ
td(on)
Turn-On Delay Time
âââ
tr
Rise Time
âââ
td(off)
Turn-Off Delay Time
âââ
tf
Fall Time
âââ
Ciss
Input Capacitance
âââ
Coss
Output Capacitance
âââ
Crss
Reverse Transfer Capacitance
âââ
Coss eff. (ER) Effective Output Capacitance (Energy Related) âââ
h Coss eff. (TR) Effective Output Capacitance (Time Related) âââ
Typ.
âââ
85
20
26
59
15
76
40
77
4520
500
250
720
880
Max. Units
Conditions
âââ S VDS = 50V, ID = 75A
120 nC ID = 75A
âââ
g VDS =30V
VGS = 10V
âââ
ID = 75A, VDS =0V, VGS = 10V
âââ ns VDD = 30V
âââ
ID = 75A
âââ
âââ
g RG = 2.7Ω
VGS = 10V
âââ pF VGS = 0V
âââ
VDS = 50V
âââ
Æ = 1.0MHz, See Fig. 5
âââ
âââ
i VGS = 0V, VDS = 0V to 48V , See Fig. 11
h VGS = 0V, VDS = 0V to 48V
Diode Characteristics
Symbol
Parameter
IS
Continuous Source Current
(Body Diode)
ISM
Pulsed Source Current
Ãd (Body Diode)
VSD
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
Reverse Recovery Current
ton
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
 âââ âââ 160 A MOSFET symbol
D
showing the
âââ âââ 620 A integral reverse
G
p-n junction diode.
S
g âââ âââ 1.3 V TJ = 25°C, IS = 75A, VGS = 0V
âââ 31
ns TJ = 25°C
VR = 51V,
âââ 35
âââ 34
TJ = 125°C
nC TJ = 25°C
g IF = 75A
di/dt = 100A/μs
âââ 45
TJ = 125°C
âââ 1.9 âââ A TJ = 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Calculated continuous current based on maximum allowable junction  ISD ⤠75A, di/dt ⤠1400A/μs, VDD ⤠V(BR)DSS, TJ ⤠175°C.
temperature. Bond wire current limit is 120A. Note that current
Â
Pulse width ⤠400μs; duty cycle ⤠2%.
limitations arising from heating of the device leads may occur with  Coss eff. (TR) is a fixed capacitance that gives the same charging time
some lead mounting arrangements.
 Repetitive rating; pulse width limited by max. junction
temperature.
 Limited by TJmax, starting TJ = 25°C, L = 0.04mH
as Coss while VDS is rising from 0 to 80% VDSS.
 Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS.
 When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
RG = 25Ω, IAS = 96A, VGS =10V. Part not recommended for use
above this value.
mended footprint and soldering techniques refer to application note #AN-994.
 Rθ is measured at TJ approximately 90°C
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April 24, 2014
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