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IRFS3207TRLPBF Datasheet, PDF (2/12 Pages) International Rectifier – High Efficiency Synchronous Rectification in SMPS | |||
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IRF/B/S/SL3207PbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
âV(BR)DSS/âTJ
RDS(on)
VGS(th)
IDSS
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
RG
Gate Input Resistance
Min. Typ. Max. Units
Conditions
75 âââ âââ
âââ 0.069 âââ
âââ 3.6 4.5
2.0 âââ 4.0
V VGS = 0V, ID = 250µA
d V/°C Reference to 25°C, ID = 1mA
g m⦠VGS = 10V, ID = 75A
V VDS = VGS, ID = 250µA
âââ âââ 20 µA VDS = 75V, VGS = 0V
âââ âââ 250
VDS = 75V, VGS = 0V, TJ = 125°C
âââ âââ 200 nA VGS = 20V
âââ âââ -200
VGS = -20V
âââ 1.2 âââ ⦠f = 1MHz, open drain
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
gfs
Forward Transconductance
150 âââ âââ
Qg
Total Gate Charge
âââ 180 260
Qgs
Gate-to-Source Charge
âââ 48 âââ
Qgd
Gate-to-Drain ("Miller") Charge
âââ 68 âââ
td(on)
Turn-On Delay Time
âââ 29 âââ
tr
Rise Time
âââ 120 âââ
td(off)
Turn-Off Delay Time
âââ 68 âââ
tf
Fall Time
âââ 74 âââ
Ciss
Input Capacitance
âââ 7600 âââ
Coss
Output Capacitance
âââ 710 âââ
Crss
Reverse Transfer Capacitance
âââ 390 âââ
ià Coss eff. (ER) Effective Output Capacitance (Energy Related) âââ 920 âââ
h Coss eff. (TR) Effective Output Capacitance (Time Related)
âââ 1010 âââ
S VDS = 50V, ID = 75A
nC ID = 75A
g VDS = 60V
VGS = 10V
ns VDD = 48V
ID = 75A
g RG = 2.6â¦
VGS = 10V
pF VGS = 0V
VDS = 50V
Æ = 1.0MHz
j VGS = 0V, VDS = 0V to 60V , See Fig.11
h VGS = 0V, VDS = 0V to 60V , See Fig. 5
Diode Characteristics
Symbol
Parameter
IS
Continuous Source Current
(Body Diode)
ISM
Pulsed Source Current
Ãdi (Body Diode)
VSD
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
Reverse Recovery Current
ton
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
 âââ âââ 170 A MOSFET symbol
D
showing the
âââ âââ 720
integral reverse
G
p-n junction diode.
S
âââ âââ 1.3
g V TJ = 25°C, IS = 75A, VGS = 0V
âââ 42 63 ns TJ = 25°C
VR = 64V,
âââ 49 74
TJ = 125°C
âââ 65 98 nC TJ = 25°C
g IF = 75A
di/dt = 100A/µs
âââ 92 140
TJ = 125°C
âââ 2.6 âââ A TJ = 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Calculated continuous current based on maximum allowable junction  Coss eff. (TR) is a fixed capacitance that gives the same charging time
temperature. Package limitation current is 75A.
as Coss while VDS is rising from 0 to 80% VDSS.
 Repetitive rating; pulse width limited by max. junction
 Coss eff. (ER) is a fixed capacitance that gives the same energy as
temperature.
 Limited by TJmax, starting TJ = 25°C, L = 0.33mH
RG = 25â¦, IAS = 75A, VGS =10V. Part not recommended for use
above this value.
Coss while VDS is rising from 0 to 80% VDSS.
 When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended
footprint and soldering techniques refer to application note #AN-994.
 Rθ is measured at TJ approximately 90°C.
 ISD ⤠75A, di/dt ⤠500A/µs, VDD ⤠V(BR)DSS, TJ ⤠175°C.
Â
Pulse width ⤠400µs; duty cycle ⤠2%.
2
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