IRFR7446PBF Datasheet, PDF (2/10 Pages) International Rectifier – Brushed Motor drive applications

IRFR7446PbF
Absolute Maximum Ratings
Symbol
Parameter
I_D @ T_C = 25°C Continuous Drain Current, V_GS @ 10V (Silicon Limited)
I_D @ T_C = 100°C
I_D @ T_C = 25°C
I_DM
P_D @T_C = 25°C
Continuous Drain Current, V_GS @ 10V (Silicon Limited)
Continuous Drain Current, V_GS @ 10V (Wire Bond Limited)
d Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
V_GS
Gate-to-Source Voltage
T_J
Operating Junction and
T_STG
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
Avalanche Characteristics
E_{AS (Thermally limited)}
e Single Pulse Avalanche Energy
E_AS (tested)
I_AR
E_AR
l Single Pulse Avalanche Energy Tested Value
d Avalanche Current
d Repetitive Avalanche Energy
Thermal Resistance
Symbol
R_θJC
R_θJA
R_θJA
Parameter
k Junction-to-Case
j Junction-to-Ambient (PCB Mount)
k Junction-to-Ambient
Max.
c 120
84c
56
520
98
0.66
± 20
-55 to + 175
300
125
160
See Fig 15,16, 23a, 23b
Typ.
–––
–––
–––
Max.
1.52
50
110
Units
A
W
W/°C
V
°C
mJ
A
mJ
Units
°C/W
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
V_(BR)DSS
ΔV_(BR)DSS/ΔT_J
R_DS(on)
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
V_GS(th)
I_DSS
Gate Threshold Voltage
Drain-to-Source Leakage Current
I_GSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
R_G
Internal Gate Resistance
Min.
40
–––
–––
2.2
–––
–––
–––
–––
–––
Typ.
–––
26
3.0
4.4
3.0
–––
–––
–––
–––
1.5
Max.
–––
–––
3.9
–––
3.9
1.0
150
100
-100
–––
Units
Conditions
Ãd V V_GS = 0V, I_D = 250μA
mV/°C Reference to 25°C, I_D = 1mA
g mΩ V_GS = 10V, I_D = 56A
g mΩ V_GS = 6.0V, I_D = 28A
V V_DS = V_GS, I_D = 100μA
μA V_DS = 40V, V_GS = 0V
V_DS = 40V, V_GS = 0V, T_J = 125°C
nA V_GS = 20V
V_GS = -20V
Ω
Notes:
… Pulse width ≤ 400μs; duty cycle ≤ 2%.
 Calculated continuous current based on maximum allowable junction † C_oss eff. (TR) is a fixed capacitance that gives the same charging time
temperature. Bond wire current limit is 56A. Note that current
as C_oss while V_DS is rising from 0 to 80% V_DSS.
limitations arising from heating of the device leads may occur with ‡ C_oss eff. (ER) is a fixed capacitance that gives the same energy as
some lead mounting arrangements. (Refer to AN-1140)
‚ Repetitive rating; pulse width limited by max. junction
C_oss while V_DS is rising from 0 to 80% V_DSS.
ˆ When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
temperature.
mended footprint and soldering techniques refer to application note #AN-994.
ƒ Limited by T_Jmax, starting T_J = 25°C, L = 0.08mH
R_G = 50Ω, I_AS = 56A, V_GS =10V.
„ I_SD ≤ 100A, di/dt ≤ 1306A/μs, V_DD ≤ V_(BR)DSS, T_J ≤ 175°C.
‰ R_θ is measured at T_J approximately 90°C.
Š This value determined from sample failure population,
starting T_J = 25°C, L= 0.08mH, R_G = 50Ω, I_AS = 56A, V_GS =20V.
* L_D and L_S are Internal Drain Inductance and Internal Source Inductance
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March 22, 2013