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IRFP3206PBF_15 Datasheet, PDF (2/8 Pages) International Rectifier – High Efficiency Synchronous Rectification in SMPS | |||
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IRFP3206PbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
V(BR)DSS
ÎV(BR)DSS/ÎTJ
RDS(on)
VGS(th)
IDSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
RG
Internal Gate Resistance
60 âââ âââ V VGS = 0V, ID = 250μA
âââ 0.07 âââ V/°C Reference to 25°C, ID = 5mAd
âââ 2.4 3.0 mΩ VGS = 10V, ID = 75A g
2.0 âââ 4.0 V VDS = VGS, ID = 150μA
âââ âââ 20 μA VDS =60V, VGS = 0V
âââ âââ 250
VDS = 48V, VGS = 0V, TJ = 125°C
âââ âââ 100 nA VGS = 20V
âââ âââ -100
VGS = -20V
âââ 0.7 âââ Ω
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
gfs
Forward Transconductance
210 âââ âââ
Qg
Total Gate Charge
âââ 120 170
Qgs
Gate-to-Source Charge
âââ 29 âââ
Qgd
Gate-to-Drain ("Miller") Charge
âââ 35
Qsync
Total Gate Charge Sync. (Qg - Qgd)
âââ 85 âââ
td(on)
Turn-On Delay Time
âââ 19 âââ
tr
Rise Time
âââ 82 âââ
td(off)
Turn-Off Delay Time
âââ 55 âââ
tf
Fall Time
âââ 83 âââ
Ciss
Input Capacitance
âââ 6540 âââ
Coss
Output Capacitance
âââ 720 âââ
Crss
Reverse Transfer Capacitance
âââ 360 âââ
Coss eff. (ER) Effective Output Capacitance (Energy Related) âââ 1040 âââ
Coss eff. (TR) Effective Output Capacitance (Time Related)h âââ 1230 âââ
S VDS = 50V, ID = 75A
nC ID = 75A
VDS =30V
VGS = 10V g
ID = 75A, VDS =0V, VGS = 10V
ns VDD = 30V
ID = 75A
RG =2.7Ω
VGS = 10V g
pF VGS = 0V
VDS = 50V
Æ = 1.0MHz, See Fig.5
VGS = 0V, VDS = 0V to 48V i, See Fig.11
VGS = 0V, VDS = 0V to 48V h
Diode Characteristics
Symbol
Parameter
IS
Continuous Source Current
(Body Diode)
ISM
Pulsed Source Current
(Body Diode) d
VSD
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
Reverse Recovery Current
ton
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
âââ âââ 200c A MOSFET symbol
showing the
âââ âââ 840 A integral reverse
D
G
p-n junction diode.
S
âââ âââ 1.3 V TJ = 25°C, IS = 75A, VGS = 0V g
âââ 33 50 ns TJ = 25°C
VR = 51V,
âââ 37 56
TJ = 125°C
âââ 41 62 nC TJ = 25°C
IF = 75A
di/dt = 100A/μs g
âââ 53 80
TJ = 125°C
âââ 2.1 âââ A TJ = 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Calculated continuous current based on maximum allowable junction  ISD ⤠75A, di/dt ⤠360A/μs, VDD ⤠V(BR)DSS, TJ ⤠175°C.
temperature. Bond wire current limit is 120A. Note that current
Â
Pulse width ⤠400μs; duty cycle ⤠2%.
limitations arising from heating of the device leads may occur with  Coss eff. (TR) is a fixed capacitance that gives the same charging time
some lead mounting arrangements.
as Coss while VDS is rising from 0 to 80% VDSS.
 Repetitive rating; pulse width limited by max. junction
 Coss eff. (ER) is a fixed capacitance that gives the same energy as
temperature.
 Limited by TJmax, starting TJ = 25°C, L = 0.023mH
RG = 25Ω, IAS = 120A, VGS =10V. Part not recommended for use
Coss while VDS is rising from 0 to 80% VDSS..
 Rθ is measured at TJ approximately 90°C
above this value .
2
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