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IRFP3206PBF_15 Datasheet, PDF (2/8 Pages) International Rectifier – High Efficiency Synchronous Rectification in SMPS
IRFP3206PbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
V(BR)DSS
ΔV(BR)DSS/ΔTJ
RDS(on)
VGS(th)
IDSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
RG
Internal Gate Resistance
60 ––– ––– V VGS = 0V, ID = 250μA
––– 0.07 ––– V/°C Reference to 25°C, ID = 5mAd
––– 2.4 3.0 mΩ VGS = 10V, ID = 75A g
2.0 ––– 4.0 V VDS = VGS, ID = 150μA
––– ––– 20 μA VDS =60V, VGS = 0V
––– ––– 250
VDS = 48V, VGS = 0V, TJ = 125°C
––– ––– 100 nA VGS = 20V
––– ––– -100
VGS = -20V
––– 0.7 ––– Ω
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
gfs
Forward Transconductance
210 ––– –––
Qg
Total Gate Charge
––– 120 170
Qgs
Gate-to-Source Charge
––– 29 –––
Qgd
Gate-to-Drain ("Miller") Charge
––– 35
Qsync
Total Gate Charge Sync. (Qg - Qgd)
––– 85 –––
td(on)
Turn-On Delay Time
––– 19 –––
tr
Rise Time
––– 82 –––
td(off)
Turn-Off Delay Time
––– 55 –––
tf
Fall Time
––– 83 –––
Ciss
Input Capacitance
––– 6540 –––
Coss
Output Capacitance
––– 720 –––
Crss
Reverse Transfer Capacitance
––– 360 –––
Coss eff. (ER) Effective Output Capacitance (Energy Related) ––– 1040 –––
Coss eff. (TR) Effective Output Capacitance (Time Related)h ––– 1230 –––
S VDS = 50V, ID = 75A
nC ID = 75A
VDS =30V
VGS = 10V g
ID = 75A, VDS =0V, VGS = 10V
ns VDD = 30V
ID = 75A
RG =2.7Ω
VGS = 10V g
pF VGS = 0V
VDS = 50V
ƒ = 1.0MHz, See Fig.5
VGS = 0V, VDS = 0V to 48V i, See Fig.11
VGS = 0V, VDS = 0V to 48V h
Diode Characteristics
Symbol
Parameter
IS
Continuous Source Current
(Body Diode)
ISM
Pulsed Source Current
(Body Diode) d
VSD
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
Reverse Recovery Current
ton
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
––– ––– 200c A MOSFET symbol
showing the
––– ––– 840 A integral reverse
D
G
p-n junction diode.
S
––– ––– 1.3 V TJ = 25°C, IS = 75A, VGS = 0V g
––– 33 50 ns TJ = 25°C
VR = 51V,
––– 37 56
TJ = 125°C
––– 41 62 nC TJ = 25°C
IF = 75A
di/dt = 100A/μs g
––– 53 80
TJ = 125°C
––– 2.1 ––– A TJ = 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Calculated continuous current based on maximum allowable junction „ ISD ≤ 75A, di/dt ≤ 360A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
temperature. Bond wire current limit is 120A. Note that current
… Pulse width ≤ 400μs; duty cycle ≤ 2%.
limitations arising from heating of the device leads may occur with † Coss eff. (TR) is a fixed capacitance that gives the same charging time
some lead mounting arrangements.
as Coss while VDS is rising from 0 to 80% VDSS.
‚ Repetitive rating; pulse width limited by max. junction
‡ Coss eff. (ER) is a fixed capacitance that gives the same energy as
temperature.
ƒ Limited by TJmax, starting TJ = 25°C, L = 0.023mH
RG = 25Ω, IAS = 120A, VGS =10V. Part not recommended for use
Coss while VDS is rising from 0 to 80% VDSS..
ˆ Rθ is measured at TJ approximately 90°C
above this value .
2
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