IRFB4310ZPBF_15 Datasheet, PDF (2/11 Pages) International Rectifier – High Efficiency Synchronous Rectification in SMPS

IRFB/S/SL4310ZPbF
Static @ T_J = 25°C (unless otherwise specified)
Symbol
Parameter
V_(BR)DSS
Drain-to-Source Breakdown Voltage
V_(BR)DSS/T_J Breakdown Voltage Temp. Coefficient
R_DS(on)
Static Drain-to-Source On-Resistance
V_GS(th)
Gate Threshold Voltage
I_DSS
Drain-to-Source Leakage Current
I_GSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
R_G
Internal Gate Resistance
Min.
100
–––
–––
2.0
–––
–––
–––
–––
–––
Typ.
–––
0.11
4.8
–––
–––
–––
–––
–––
0.7
Max. Units
Conditions
––– V V_GS = 0V, I_D = 250μA
––– V/°C Reference to 25°C, I_D = 5mAd
6.0 m V_GS = 10V, I_D = 75A g
4.0 V V_DS = V_GS, I_D = 150μA
20 μA V_DS = 100V, V_GS = 0V
250
V_DS = 80V, V_GS = 0V, T_J = 125°C
100 nA V_GS = 20V
-100
–––
V_GS = -20V

Dynamic @ T_J = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
gfs
Forward Transconductance
150 ––– –––
Q_g
Total Gate Charge
––– 120 170
Q_gs
Gate-to-Source Charge
––– 29 –––
Q_gd
Gate-to-Drain ("Miller") Charge
––– 35
Q_sync
Total Gate Charge Sync. (Q_g - Q_gd)
––– 85 –––
t_d(on)
Turn-On Delay Time
––– 20 –––
t_r
Rise Time
––– 60 –––
t_d(off)
Turn-Off Delay Time
––– 55 –––
t_f
Fall Time
––– 57 –––
C_iss
Input Capacitance
––– 6860 –––
C_oss
Output Capacitance
––– 490 –––
C_rss
Reverse Transfer Capacitance
––– 220 –––
C_oss eff. (ER) Effective Output Capacitance (Energy Related) ––– 570 –––
C_oss eff. (TR) Effective Output Capacitance (Time Related)h ––– 920 –––
S V_DS = 50V, I_D = 75A
nC I_D = 75A
V_DS =50V
V_GS = 10V g
I_D = 75A, V_DS =0V, V_GS = 10V
ns V_DD = 65V
I_D = 75A
R_G = 2.7
V_GS = 10V g
pF V_GS = 0V
V_DS = 50V
ƒ = 1.0MHz, See Fig. 5
V_GS = 0V, V_DS = 0V to 80V i, See Fig. 11
V_GS = 0V, V_DS = 0V to 80V h
Diode Characteristics
Symbol
Parameter
I_S
Continuous Source Current
(Body Diode)
I_SM
Pulsed Source Current
(Body Diode) d
V_SD
Diode Forward Voltage
t_rr
Reverse Recovery Time
Q_rr
Reverse Recovery Charge
I_RRM
Reverse Recovery Current
t_on
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
––– ––– 127c A MOSFET symbol
D
showing the
––– ––– 560 A integral reverse
G
p-n junction diode.
S
––– ––– 1.3 V T_J = 25°C, I_S = 75A, V_GS = 0V g
––– 40
ns T_J = 25°C
V_R = 85V,
––– 49
––– 58
T_J = 125°C
nC T_J = 25°C
I_F = 75A
di/dt = 100A/μs g
––– 89
T_J = 125°C
––– 2.5 ––– A T_J = 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Calculated continuous current based on maximum allowable junction … Pulse width  400μs; duty cycle  2%.
temperature. Bond wire current limit is 120A. Note that current
† C_oss eff. (TR) is a fixed capacitance that gives the same charging time
limitations arising from heating of the device leads may occur with
as C_oss while V_DS is rising from 0 to 80% V_DSS.
some lead mounting arrangements.
‚ Repetitive rating; pulse width limited by max. junction
temperature.
ƒ Limited by T_Jmax, starting T_J = 25°C, L = 0.28mH
R_G = 25, I_AS = 58A, V_GS =10V. Part not recommended for use
‡ C_oss eff. (ER) is a fixed capacitance that gives the same energy as
C_oss while V_DS is rising from 0 to 80% V_DSS.
ˆ When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application note #AN-994.
‰ R_ is measured at T_J approximately 90°C
above the Eas value and test conditions.
„ I_SD  75A, di/dt  600A/μs, V_DD V_(BR)DSS, T_J  175°C.
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