IRFB4110PBF_15 Datasheet, PDF (2/9 Pages) International Rectifier – High Efficiency Synchronous Rectification in SMPS

IRFB4110PbF
Static @ T_J = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
V_(BR)DSS
∆V_(BR)DSS/∆T_J
R_DS(on)
V_GS(th)
I_DSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Drain-to-Source Leakage Current
I_GSS
Gate-to-Source Forward Leakage
100 ––– –––
––– 0.108 –––
––– 3.7 4.5
2.0 ––– 4.0
––– ––– 20
––– ––– 250
––– ––– 100
V V_GS = 0V, I_D = 250µA
d V/°C Reference to 25°C, I_D = 5mA
g _mΩ V_GS = 10V, I_D = 75A
V V_DS = V_GS, I_D = 250µA
µA V_DS = 100V, V_GS = 0V
V_DS = 100V, V_GS = 0V, T_J = 125°C
nA V_GS = 20V
Gate-to-Source Reverse Leakage
––– ––– -100
V_GS = -20V
Dynamic @ T_J = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
gfs
Forward Transconductance
Q_g
Total Gate Charge
Q_gs
Gate-to-Source Charge
Q_gd
Gate-to-Drain ("Miller") Charge
160 ––– –––
––– 150 210
––– 35 –––
––– 43 –––
S V_DS = 50V, I_D = 75A
nC I_D = 75A
g ^{VDS = 50V}
V_GS = 10V
R_G
Gate Resistance
––– 1.3 –––
t_d(on)
Turn-On Delay Time
––– 25 –––
t_r
Rise Time
––– 67 –––
t_d(off)
Turn-Off Delay Time
––– 78 –––
t_f
Fall Time
––– 88 –––
C_iss
Input Capacitance
––– 9620 –––
C_oss
Output Capacitance
––– 670 –––
C_rss
Reverse Transfer Capacitance
––– 250 –––
i ^Coss ^{eff. (ER)} Effective Output Capacitance (Energy Related) ––– 820 –––
h ^Coss ^{eff. (TR)} Effective Output Capacitance (Time Related)
––– 950 –––
Ω
ns V_DD = 65V
I_D = 75A
g ^{RG = 2.6Ω}
V_GS = 10V
pF V_GS = 0V
V_DS = 50V
ƒ = 1.0MHz
j V_GS = 0V, V_DS = 0V to 80V
h V_GS = 0V, V_DS = 0V to 80V
Diode Characteristics
Symbol
Parameter
I_S
Continuous Source Current
(Body Diode)
I_SM
Pulsed Source Current
Ãdi (Body Diode)
V_SD
Diode Forward Voltage
t_rr
Reverse Recovery Time
Q_rr
Reverse Recovery Charge
I_RRM
Reverse Recovery Current
t_on
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
™ ––– ––– 170 A MOSFET symbol
D
showing the
––– ––– 670
integral reverse
G
––– ––– 1.3
g ^{p-n junction diode.}
V T_J = 25°C, I_S = 75A, V_GS = 0V
S
––– 50 75 ns T_J = 25°C
V_R = 85V,
––– 60 90
T_J = 125°C
––– 94 140 nC T_J = 25°C
g ^{IF = 75A}
di/dt = 100A/µs
––– 140 210
T_J = 125°C
––– 3.5 ––– A T_J = 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Calculated continuous current based on maximum allowable junction „ I_SD ≤ 75A, di/dt ≤ 630A/µs, V_DD ≤ V_(BR)DSS, T_J ≤ 175°C.
temperature. Bond wire current limit is 120A. Note that current
… Pulse width ≤ 400µs; duty cycle ≤ 2%.
limitations arising from heating of the device leads may occur with † Coss eff. (TR) is a fixed capacitance that gives the same charging time
some lead mounting arrangements.
as C_oss while V_DS is rising from 0 to 80% V_DSS.
‚ Repetitive rating; pulse width limited by max. junction
temperature.
ƒ Limited by T_Jmax, starting T_J = 25°C, L = 0.033mH
‡ C_oss eff. (ER) is a fixed capacitance that gives the same energy as
C_oss while V_DS is rising from 0 to 80% V_DSS.
ˆ When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
R_G = 25Ω, I_AS = 108A, V_GS =10V. Part not recommended for use
above this value.
mended footprint and soldering techniques refer to application note #AN-994.
‰ R_θ is measured at T_J approximately 90°C.
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April 28, 2014