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IRFB3306PBF Datasheet, PDF (2/11 Pages) International Rectifier – High Efficiency Synchronous Rectification in SMPS
IRFB/S/SL3306PbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
RG
Internal Gate Resistance
60 ––– ––– V VGS = 0V, ID = 250µA
––– 0.07 ––– V/°C Reference to 25°C, ID = 5mAd
––– 3.3 4.2 mΩ VGS = 10V, ID = 75A g
2.0 ––– 4.0 V VDS = VGS, ID = 150µA
––– ––– 20 µA VDS = 60V, VGS = 0V
––– ––– 250
VDS = 48V, VGS = 0V, TJ = 125°C
––– ––– 100 nA VGS = 20V
––– ––– -100
VGS = -20V
––– 0.7 ––– Ω
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
gfs
Forward Transconductance
230 ––– –––
Qg
Total Gate Charge
––– 85 120
Qgs
Gate-to-Source Charge
––– 20 –––
Qgd
Gate-to-Drain ("Miller") Charge
––– 26
Qsync
Total Gate Charge Sync. (Qg - Qgd)
––– 59 –––
td(on)
Turn-On Delay Time
––– 15 –––
tr
Rise Time
––– 76 –––
td(off)
Turn-Off Delay Time
––– 40 –––
tf
Fall Time
––– 77 –––
Ciss
Input Capacitance
––– 4520 –––
Coss
Output Capacitance
––– 500 –––
Crss
Reverse Transfer Capacitance
––– 250 –––
Coss eff. (ER) Effective Output Capacitance (Energy Related) ––– 720 –––
Coss eff. (TR) Effective Output Capacitance (Time Related)h ––– 880 –––
S VDS = 50V, ID = 75A
nC ID = 75A
VDS =30V
VGS = 10V g
ID = 75A, VDS =0V, VGS = 10V
ns VDD = 30V
ID = 75A
RG = 2.7Ω
VGS = 10V g
pF VGS = 0V
VDS = 50V
ƒ = 1.0MHz, See Fig. 5
VGS = 0V, VDS = 0V to 48V i, See Fig. 11
VGS = 0V, VDS = 0V to 48V h
Diode Characteristics
Symbol
Parameter
IS
Continuous Source Current
(Body Diode)
ISM
Pulsed Source Current
(Body Diode) d
VSD
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
Reverse Recovery Current
ton
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
––– ––– 160c A MOSFET symbol
D
showing the
––– ––– 620 A integral reverse
G
p-n junction diode.
S
––– ––– 1.3 V TJ = 25°C, IS = 75A, VGS = 0V g
––– 31
ns TJ = 25°C
VR = 51V,
––– 35
TJ = 125°C
IF = 75A
––– 34
nC TJ = 25°C
di/dt = 100A/µs g
––– 45
TJ = 125°C
––– 1.9 ––– A TJ = 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Calculated continuous current based on maximum allowable junction † Coss eff. (TR) is a fixed capacitance that gives the same charging time
temperature. Package limitation current is 75A
‚ Repetitive rating; pulse width limited by max. junction
temperature.
ƒ Limited by TJmax, starting TJ = 25°C, L = 0.07mH
as Coss while VDS is rising from 0 to 80% VDSS.
‡ Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS.
ˆ When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
RG = 25Ω, IAS = 75A, VGS =10V. Part not recommended for use
above this value.
mended footprint and soldering techniques refer to application note #AN-994.
‰ Rθ is measured at TJ approximately 90°C
„ ISD ≤ 75A, di/dt ≤ 1400A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
… Pulse width ≤ 400µs; duty cycle ≤ 2%.
2
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