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AUIRF2805S Datasheet, PDF (2/14 Pages) International Rectifier – Advanced Planar Technology | |||
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AUIRF2805S/L
Static Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
Conditions
V(BR)DSS
ÎV(BR)DSS/ÎTJ
RDS(on)
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
55 âââ âââ
V VGS = 0V, ID = 250μA
âââ 0.06 âââ V/°C Reference to 25°C, ID = 1mA
âââ
3.9
4.7
f mΩ VGS = 10V, ID = 104A
VGS(th)
Gate Threshold Voltage
2.0 âââ 4.0
V VDS = VGS, ID = 250μA
gfs
Forward Transconductance
91 âââ âââ
S VDS = 25V, ID = 104A
IDSS
Drain-to-Source Leakage Current
âââ âââ 20
μA VDS = 55V, VGS = 0V
âââ âââ 250
VDS = 44V, VGS = 0V, TJ = 150°C
IGSS
Gate-to-Source Forward Leakage
âââ âââ 200 nA VGS = 20V
Gate-to-Source Reverse Leakage
âââ âââ -200
VGS = -20V
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Qg
Total Gate Charge
âââ 150 230
ID = 104A
Qgs
Gate-to-Source Charge
âââ 38
57
nC VDS = 44V
Qgd
Gate-to-Drain ("Miller") Charge
âââ 52
78
f VGS = 10V
td(on)
Turn-On Delay Time
âââ 14 âââ
VDD = 28V
tr
Rise Time
âââ 120 âââ
ID = 104A
td(off)
tf
Turn-Off Delay Time
Fall Time
âââ 68 âââ
âââ 110 âââ
ns RG = 2.5Ω
Ãf VGS = 10V
LD
Internal Drain Inductance
âââ 4.5 âââ
Between lead,
D
nH 6mm (0.25in.)
LS
Internal Source Inductance
âââ 7.5 âââ
Between lead,
G
and center of die contact
S
Ciss
Input Capacitance
âââ 5110 âââ
VGS = 0V
Coss
Output Capacitance
âââ 1190 âââ
VDS = 25V
Crss
Reverse Transfer Capacitance
âââ 210 âââ
Æ = 1.0MHz, See Fig.5
Coss
Output Capacitance
âââ 6470 âââ
pF
VGS = 0V, VDS = 1.0V, Æ =1.0MHz
Coss
Coss eff.
g Output Capacitance
Effective Output Capacitance
âââ 860 âââ
âââ 1600 âââ
VGS = 0V, VDS = 44V, Æ =1.0MHz
VGS = 0V, VDS = 0V to 44V
Diode Characteristics
Parameter
IS
Continuous Source Current
(Body Diode)
ISM
Pulsed Source Current
ÃÂ (Body Diode)
VSD
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
ton
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
h âââ âââ 175
MOSFET symbol
D
A showing the
âââ âââ 700
âââ âââ 1.3
integral reverse
G
V
f p-n junction diode.
TJ = 25°C, IS = 104A, VGS = 0V
S
âââ
âââ
80 120
290 430
f ns TJ = 25°C, IF = 104A
nC di/dt = 100A/μs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by max. junction
temperature. (See fig. 11).
 Starting TJ = 25°C, L = 0.08mH, RG = 25Ω, IAS = 104A.
(See Figure 12).
 ISD ⤠104A, di/dt ⤠240A/μs, VDD ⤠V(BR)DSS, TJ ⤠175°C
 Pulse width ⤠400μs; duty cycle ⤠2%.
Â
Coss eff. is a fixed capacitance that gives the same charging
time as Coss while VDS is rising from 0 to 80% VDSS .
 Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 75A.
 Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
 This value determined from sample failure population
Starting TJ = 25°C, L = 0.08mH, RG = 25Ω, IAS = 104A.
 When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to
application note #AN-994.
2
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