IRS2540 Datasheet, PDF (18/28 Pages) International Rectifier – IRPLLED1 High Voltage LED Driver using the IRS2540

VBUS
R1 R2
C1
OUT1
1
C2
R3
IN1(-)
2
IN1(+)
3
GND
4
R4
RS2
IC2 ₈ ^VCC
OUT2
7
IN2(-)
6
IN2(+)
5
CVCC4
R6
CVCC3
R5
POT1 DEN2
Out to
ENN pin
COM
Fig. 22: Suggested PWM Driver (not included in IRPLLED1)
If an external supply for V_CC is used, the minimum amount of dimming achievable (light output
approaches 0%) will be determined by the “on” time of the HO output, when in a fully functional
regulating state. To maintain reliable dimming, it is recommended to keep the “off” time of the enable
signal at least 10 times that of the HO “on” time. For example, if the application is running at 75 kHz
with an input voltage of 100 V and an output voltage of 20 V, the HO “on” time will be 3.3 µs (one-
fourth of the period – see calculations below) according to standard buck topology theory. This will
set the minimum “off” time of the enable signal to 33 µs.
Duty Cycle = ^Vout ∗100 = ^{20 V} *100 = 20%
V_in
100 V
HO_{on time}
=
20% *
1
75
kHz
=
3.3
µs
If the chip is supplied from the output, a large enough capacitor on V_CC is required to maintain
sufficient current while in a disabled state. For this evaluation board, where the IC supply comes from
the output, a 10 µF capacitor is used to ensure continued proper operation while disabled, the output is
capable of dimming down to roughly 10 V. A “strobe light” effect in the LEDs may be observed if
V_CC drops too much or if the dimming frequency is too low.
www.irf.com
RD-0608
18