IR2114SSPBF Datasheet, PDF (18/33 Pages) International Rectifier – HALF-BRIDGE GATE DRIVER IC

Vcc/Vb
RDRp
Iavg
C_RES
R_Gon
COM/Vs
Figure 21: RGon Sizing
where R_TOT = R_DRp + R_Gon
RGon = gate on-resistor
R_DRp = driver equivalent on-resistance
When RGon > 7 Ω, RDRp is defined by
R _DRp
=
_Vcc


I
o1+

+
Vcc
I _{o 2+}

t _SW
t_on1
Vcc
−1_{}

I _o1+
when t_SW > t_on1
when t_SW ≤ t_on1
(I_O1+ ,I_O2+ and t_on1 from “Static Electrical
Characteristics”).
Table 1 reports the gate resistance size for two
commonly used IGBTs (calculation made using typical
datasheet values and assuming V_CC= 15 V).
Output Voltage Slope: The turn-on gate resistor
RGon can be sized to control the output slope
(dV_OUT/dt). While the output voltage has a non-
linear behaviour, the maximum output slope can be
approximated by:
dV_{out =} ^I _avg
dt
C_RESoff
inserting the expression yielding Iavg and rearranging:
R_TOT
=
Vcc − V_ge^*
C _RESoff
⋅ ^dVout
dt
As an example, table 2 shows the sizing of gate
resistance to get dV_out/dt= 5 V/ns when using two
popular IGBTs (typical datasheet values are used and
VCC= 15 V is assumed).
NOTICE: Turn on time must be lower than TBL to avoid
improper desaturation detection and SSD triggering.
2.6 Sizing the Turn-Off Gate Resistor
The worst case in sizing the turn-off resistor RGoff is
when the collector of the IGBT in the off state is forced
to commutate by an external event (e.g., the turn-on of
the companion IGBT). In this case the dV/dt of the
output node induces a parasitic current through CRESoff
flowing in RGoff and RDRn (see Fig. 22). If the voltage
drop at the gate exceeds the threshold voltage of the
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IR211(4,41)/IR221(4,41)SSPbF
IGBT, the device may self turn on, causing large
oscillation and relevant cross conduction.
HS Turning ON
dV/dt
C_RESoff
R_Goff
OFF
ON
R_DRn
C _IES
Figure 22: RGoff Sizing: Current Path When Low Side is
Off and High Side Turns On
The transfer function between the IGBT collector and
the IGBT gate then becomes:
V_{ge =}
s ⋅ (R_Goff + R_DRn ) ⋅ C_RESoff
V_de 1 + s ⋅ (R_Goff + R_DRn ) ⋅ (C_RESoff + C_IES )
Which yields to a high pass filter with a pole at:
1/τ =
1
(R_Goff + R_DRn ) ⋅ (C_RESoff + C_IES )
As a result, when τ is faster than the collector rise time
(to be verified after calculation) the transfer function can
be approximated by:
V_ge
V_de
= s ⋅ (R_Goff
+ R_DRn ) ⋅ C_RESoff
So
that
V_ge
= (R_Goff
+ R_DRn ) ⋅ C_RESoff
⋅ ^dVde
dt
time domain.
in the
Then the condition:
( ) V_th > V_ge =
R_Goff
+ R_DRn
⋅ C_RESoff
dV_out
dt
must be verified to avoid spurious turn on.
Rearranging the equation yields:
R_Goff
<
V_th
C_RESoff
⋅
dV
dt
− R_DRn
In any case, the worst condition for unwanted turn on is
with very fast steps on the IGBT collector.
In that case, the collector to gate transfer function can
be approximated with the capacitor divider:
V_ge
= V_de
⋅
C_RESoff
(C_RESoff + C_IES )
which is driven only by IGBT characteristics.
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