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AN-1035 Datasheet, PDF (16/42 Pages) International Rectifier – Application Note
Appendix A.2 SQ-outline
Device outline
Figure A.2.1 shows the outline for SQ-outline
DirectFET devices. The relative pad positions are
controlled to an accuracy of ±0.065mm. For full
dimensions and tolerances of each device, and to find
out its size and outline, refer to the relevant product
data sheet and package outline drawing.
(dimensions in mm)
Figure A.2.1 SQ-outline device outline
Substrate/PCB layout
Evaluations have shown that the best overall
performance is achieved using the substrate/PCB
layout shown in Figure A.2.2 (a and b). Gate and
source pads on the substrate are oversized by
0.025mm (0.001") on each side. Drain pads are
thickened by 0.500mm (0.020"). Each drain contact
pad is divided into two separate pads, as this has
been shown to improve solder joint quality.
(dimensions in mm)
Figure A.2.2(b) SQ-outline substrate/PCB layout
Stencil design
Evaluations have shown that the best overall
performance is achieved using the stencil design
shown in Figure A.2.3 (a and b).
Note: This design is for a stencil thickness of 0.150mm
(0.006"). The reduction should be adjusted for stencils of
other thicknesses.
(dimensions in mm)
Figure A.2.3(a) SQ-outline stencil design
(dimensions in mm)
Figure A.2.2(a) SQ-outline substrate/PCB layout
(dimensions in mm)
Figure A.2.3(b) SQ-outline stencil design
DirectFET® Technology
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AN-1035
Version 28 (revision history), April 2016
Board Mounting Application Note
Page 16 of 42