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IRS2573D Datasheet, PDF (14/28 Pages) International Rectifier – HID BALLAST CONTROL IC
IRS2573D
State Diagram†
Power Turned On
FAULT Mode
Fault Latch Set
Full-Bridge Off (CT=0V)
Buck Off
IGN Timer Off (TIGN=0V)
CLK Off (TCLK=0V)
IQCC 350 A
VCC = 15.6V
All Counters Reset
VCC < UVLO-
(Power Off)
or
RST > VRST+
(Fault Reset)
VSENSE > VOV(2/5) for 787sec
(open circuit)
UVLO Mode
Full-Bridge Off (CT=0V)
Buck Off (ICOMP, PCOMP,
TOFF=0V)
IGN Timer Off (TIGN=0V)
CLK Off (TCLK=0V)
IQCC 150 A
Fault and Good Counters Reset
Fault Latch Reset
VCC > UVLO+
and
VSENSE > VOV
and
RST < VRST-
IGN Mode
IGN (21s 'HIGH'/64s 'LOW')
Ignition Counter Enabled
Buck and Full-Bridge Enabled
CLK and Fault Counters Enabled
Good Counter Reset
VSENSE OVP Enabled
VCC < UVLO-
(VCC Fault or Power Down)
VOV(2/5) < VSENSE < VOV
and
PCOMP > 0.2V
and
ICOMP > 0.5V
VSENSE > VOV(2/5)
VSENSE < VOV(2/5)
VSENSE < VOV(1/7.5) for 197sec
(short circuit or does not warm up)
or
VSENSE < VOV(1/7.5) for 16384 Events
Good Counter = 2730sec
(No faults detected)
GENERAL Mode
Full-Bridge Oscillating @ fBRIDGE
Buck Enabled
IGN 'LOW'
CLK and Fault Counters Enabled
VSENSE OVP Enabled
ISENSE Over-current Limitation Enabled
Constant Power Control Enabled
VSENSE < VOV(1/7.5)
VSENSE > VOV
or
PCOMP < 0.2V
or
ICOMP < 0.2V
Reset
Fault and Good
Counters
Reset
Good
Counter
VSENSE < VOV(2/5)
and
PCOMP > 0.2V
and
ICOMP > 0.5V
BUCK OFF Mode
Buck Off
Full-Bridge Oscillating
Fault Counters Enabled
† All values are typical. Applies to application circuit on page 1.
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