IRF6802SDPBF_15 Datasheet, PDF (1/9 Pages) International Rectifier – RoHs Compliant Containing No Lead and Bromide

IRF6802SDPbF
IRF6802SDTRPbF
DirectFET^®plus Power MOSFET ‚
l RoHs Compliant Containing No Lead and Bromide 
l Low Profile (<0.7 mm)
Typical values (unless otherwise specified)
V_DSS
V_GS
R_DS(on)
R_DS(on)
l Dual Sided Cooling Compatible 
25V max ±16V max 3.2mΩ@ 10V 4.5mΩ@ 4.5V
l Low Package Inductance
l Optimized for High Frequency Switching 
l Ideal for CPU Core DC-DC Converters
Q_{g tot} Q_gd
8.8nC 3.1nC
Q_gs2
1.1nC
Q_rr
22nC
Q_oss V_gs(th)
13nC 1.6V
l Optimized for Control FET socket of Sync. Buck Converter
l Low Conduction and Switching Losses
l Compatible with existing Surface Mount Techniques 
GG
D
D
l 100% Rg tested
SS
SA
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ
SX
ST
SA
MQ
MX
MT
MP
DirectFET^®plus ISOMETRIC
MB
Description
The IRF6802SDTRPbF combines the latest HEXFET^® Power MOSFET Silicon technology with the advanced DirectFET^® packaging to
achieve improved performance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile. The DirectFET^® package is
compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection
soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET^®
package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF6802SDTRPbF has low gate resistance and low charge along with ultra low package inductance providing significant reduction in
switching losses. The reduced losses make this product ideal for high efficiency DC-DC converters that power the latest generation of
processors operating at higher frequencies. The IRF6802SDTRPbF has been optimized for the control FET socket of synchronous buck
operating from 12 volt bus converters.
Absolute Maximum Ratings
Parameter
V_DS
Drain-to-Source Voltage
V_GS
I_D @ T_A = 25°C
I_D @ T_A = 70°C
I_D @ T_C = 25°C
I_DM
E_AS
I_AR
Gate-to-Source Voltage
e Continuous Drain Current, V_GS @ 10V
e Continuous Drain Current, V_GS @ 10V
f Continuous Drain Current, V_GS @ 10V
g Pulsed Drain Current
h Single Pulse Avalanche Energy
Ãg Avalanche Current
Max.
25
±16
16
13
57
130
66
13
Units
V
A
mJ
A
10
14.0
ID = 16A
12.0 ^{ID= 13A VDS= 20V}
8
10.0
VDS= 13V
6
TJ = 125°C
VDS= 6.0V
8.0
4
6.0
4.0
2
TJ = 25°C
2.0
0
2
4
6
8 10 12 14 16
0.0
0
5
10
15
20
25
VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
Notes:
 Click on this section to link to the appropriate technical paper.
‚ Click on this section to link to the DirectFET Website.
ƒ Surface mounted on 1 in. square Cu board, steady state.
QG Total Gate Charge (nC)
Fig 2. Typical Total Gate Charge vs. Gate-to-Source Voltage
„ T_C measured with thermocouple mounted to top (Drain) of part.
… Repetitive rating; pulse width limited by max. junction temperature.
† Starting T_J = 25°C, L = 0.78mH, R_G = 50Ω, I_AS = 13A.
1
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September 10, 2013