IRF6715MTR1PBF Datasheet, PDF (1/9 Pages) International Rectifier – RoHs Compliant Containing No Lead and Bromide

PD - 96117A
IRF6715MPbF
IRF6715MTRPbF
DirectFET™ Power MOSFET ‚
l RoHs Compliant Containing No Lead and Bromide 
l Low Profile (<0.6 mm)
l Dual Sided Cooling Compatible 
l Ultra Low Package Inductance
Typical values (unless otherwise specified)
V_DSS
V_GS
R_DS(on)
R_DS(on)
25V max ±20V max 1.3mΩ@ 10V 2.1mΩ@ 4.5V
Q_{g tot} Q_gd Q_gs2
Q_rr
Q_oss V_gs(th)
l Optimized for High Frequency Switching 
40nC 12.0nC 5.3nC 37nC 26nC 1.9V
l Ideal for CPU Core DC-DC Converters
l Optimized for Sync. FET socket of Sync. Buck Converter
l Low Conduction and Switching Losses
l Compatible with existing Surface Mount Techniques 
l 100% Rg tested
MX
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
DirectFET™ ISOMETRIC
SQ
SX
ST
MQ
MX
MT
MP
Description
The IRF6715MPbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFET^TM packaging to achieve
the lowest on-state resistance in a package that has the footprint of a SO-8 and only 0.6 mm profile. The DirectFET package is compatible
with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering
techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows
dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF6715MPbF balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and
switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of
processors operating at higher frequencies. The IRF6715MPbF has been optimized for parameters that are critical in synchronous buck
including Rds(on), gate charge and Cdv/dt-induced turn on immunity. The IRF6715MPbF offers particularly low Rds(on) and high Cdv/dt
immunity for synchronous FET applications.
Absolute Maximum Ratings
Parameter
V_DS
Drain-to-Source Voltage
V_GS
I_D @ T_A = 25°C
I_D @ T_A = 70°C
I_D @ T_C = 25°C
I_DM
E_AS
I_AR
Gate-to-Source Voltage
e Continuous Drain Current, V_GS @ 10V
e Continuous Drain Current, V_GS @ 10V
f Continuous Drain Current, V_GS @ 10V
g Pulsed Drain Current
h Single Pulse Avalanche Energy
Ãg Avalanche Current
Max.
25
±20
34
27
180
270
200
27
Units
V
A
mJ
A
4
ID = 34A
3
2
TJ = 125°C
1
TJ = 25°C
0
2 4 6 8 10 12 14 16 18 20
VGS, Gate -to -Source Voltage (V)
Notes:
Fig 1. Typical On-Resistance Vs. Gate Voltage
 Click on this section to link to the appropriate technical paper.
‚ Click on this section to link to the DirectFET Website.
ƒ Surface mounted on 1 in. square Cu board, steady state.
www.irf.com
14.0
12.0 ^{ID= 27A} VDS= 20V
10.0
VDS= 13V
8.0
6.0
4.0
2.0
0.0
0
20
40
60
80 100 120
QG Total Gate Charge (nC)
Fig 2. Typical Total Gate Charge vs Gate-to-Source Voltage
„ T_C measured with thermocouple mounted to top (Drain) of part.
… Repetitive rating; pulse width limited by max. junction temperature.
† Starting T_J = 25°C, L = 0.56mH, R_G = 25Ω, I_AS = 27A.
1
08/15/07