IR3840WMPBF_12 Datasheet, PDF (1/34 Pages) International Rectifier – HIGHLY EFFICIENT INTEGRATED 12A SYNCHRONOUS BUCK REGULATOR

PD-97505
IR3840AMPbF
SupIRBuck^TM
HIGHLY EFFICIENT
INTEGRATED 14A SYNCHRONOUS BUCK REGULATOR
Features
• Greater than 96% Maximum Efficiency
• Wide Input Voltage Range 1.5V to 16V
• Wide Output Voltage Range 0.7V to 0.9*Vin
• Continuous 14A Load Capability
• Integrated Bootstrap-diode
• High Bandwidth E/A for excellent transient
performance
• Programmable Switching Frequency up to 1.0MHz
• Programmable Over Current Protection
• PGood output
• Hiccup Current Limit
• Precision Reference Voltage (0.7V, +/-1%)
• Programmable Soft-Start
• Enable Input with Voltage Monitoring Capability
• Enhanced Pre-Bias Start-up
• Seq input for Tracking applications
• -40^oC to 125^oC operating junction temperature
• Thermal Protection
• Pin compatible option for 4A, 8A and 12A devices
• 5mm x 6mm Power QFN package, 0.9 mm height
• Lead-free, halogen-free and RoHS compliant
Applications
• Server Applications
• Storage Applications
• Embedded Telecom Systems
Description
The IR3840A SupIRBuck^TM is an easy-to-use,
fully integrated and highly efficient DC/DC
synchronous Buck regulator. The MOSFETs co-
packaged with the on-chip PWM controller make
IR3840A a space-efficient solution, providing
accurate power delivery for low output voltage
applications.
IR3840A is a versatile regulator which offers
programmability of start up time, switching
frequency and current limit while operating in
wide input and output voltage range.
The switching frequency is programmable from
250kHz to 1.0MHz for an optimum solution.
It also features important protection functions,
such as Pre-Bias startup, hiccup current limit and
thermal shutdown to give required system level
security in the event of fault conditions.
• Distributed Point of Load Power Architectures
• Netcom Applications
• Computing Peripheral Voltage Regulators
• General DC-DC Converters
1.5V <Vin<16V
4.5V <Vcc<5.5V
Seq
Enable
Vin _Boot
Vcc
Vo
SW
PGood
PGood
OCSet
Fb
Rt
SS/ SD Gnd
Comp
PGnd
Fig. 1. Typical application diagram
Rev 11.0
1