IR36021 Datasheet, PDF (1/41 Pages) International Rectifier – DIGITAL POL BUCK CONTROLLER with I2C AND PMBus Interface

DIGITAL POL BUCK CONTROLLER with I2C AND PMBus
Interface
IR36021
FEATURES
 Dual output (2+1) Digital Controller with proprietary
control algorithm
 Two‐phase operation available on Output #1 for
powering very high current ASICs and DSPs
 I2C /PMBus interface for configuration & telemetry
with pin programmable address
 Operating ambient temperature: ‐40⁰C to 85⁰C
 3.3V bias operation
 Independent loop switching frequencies from 200kHz
to 2MHz per phase
 IR Efficiency Shaping with Dynamic Phase Control
(DPC)
 Active Diode Emulation modes for light load efficiency
 IR Adaptive Transient Algorithm (ATA) minimizes
output bulk capacitors and system cost
 Independent OVP, UVP, OCP for each output
 Thermal Protection (OTP) and VRHOT# flag
 Multiple time programmable (MTP) memory for
custom configuration
 Flexible I2C bus security features
 Pb‐Free, RoHS, 32‐pin 5mm X 5mm QFN package
BASIC APPLICATION
DESCRIPTION
The IR36021 is a dual‐loop digital multi‐phase buck
controller designed for point of load applications.
The IR36021 include Efficiency Shaping Technology to
deliver exceptional efficiency at minimum cost across the
entire load range. Dynamic Phase Control adds/drops
active phases based upon load current and can be
configured to enter 1‐phase operation and diode emulation
mode automatically or by command.
IR’s unique Adaptive Transient Algorithm (ATA), based on
proprietary non‐linear digital PWM algorithms, minimizes
output bulk capacitors and Multiple Time Programmable
(MTP) storage saves pins and enables a small package size.
Device configuration and fault parameters are easily
defined using the IR Intuitive Power Designer (IPD) GUI and
stored in on‐chip MTP.
The IR36021 provides extensive OVP, UVP, OCP and OTP
fault protection and includes thermistor based temperature
sensing with VRHOT signal.
The IR36021 includes numerous features like register
diagnostics for fast design cycles and platform
differentiation, truly simplifying VRD design and enabling
fastest time‐to‐market (TTM) with “set‐and‐forget”
methodology.
APPLICATIONS
 Embedded Telecom Systems
 Netcom Applications
 Server Application
 Distributed Point of Load Power Architectures
PIN DIAGRAM
Figure 1: IR36021 Basic Application Circuit
1 February 27, 2013 | Rev 3.5
Figure 2: IR36021 Package Top View