IR3563A Datasheet, PDF (1/4 Pages) International Rectifier – Single Output Digital Multi-Phase Controller

Single Output Digital Multi-Phase Controller _IR3563A
FEATURES
 8-phase single output PWM Controller
 Intel® VR12 and VR12.5 modes & Memory VR mode
 Overclocking & Gaming Mode
 PVI and SVI GPU VR modes
 Switching frequency from 200kHz to 2MHz per
phase
 IR Efficiency Shaping Features including Variable
Gate Drive, Dynamic Phase Control and Automatic
Power State Switching
 Programmable 1-phase or 2-phase operation for
Light Loads and Active Diode Emulation for Very
Light Loads
 IR Adaptive Transient Algorithm (ATA) minimizes
output bulk capacitors and system cost
 Auto-Phase Detection with auto-compensation
 Fault Protection: OVP, UVP, OCP, OTP, CFP
 I2C/SMBus/PMBus system interface for telemetry of
Temperature, Voltage, Current & Power
 Multiple Time Programming (MTP) with integrated
charge pump for easy custom configuration
 Compatible with IR ATL and 3.3V tri-state Drivers
 +3.3V supply voltage; -20ºC to 85ºC ambient
operation
 Pb-Free, RoHS, 6x6mm 48-pin, 0.4mm pitch QFN
APPLICATIONS
 Intel® VR12 and VR12.5 based systems
 Overclocked & Gaming platforms
BASIC APPLICATION
VR_RDY_L1
VR_HOT#
ENABLE
SV_CLK
SV_DIO
SV_ALERT
3.3V
IR3563A
VR_RDY_L1 PWM1
ISEN1
VR_HOT# ^IRTN1
ENABLE
SV_CLK
PWM2
ISEN2
IRTN2
SV_DIO
SV_ALERT
VCC
PWM3
ISEN3
IRTN3
PWM8
ISEN8
IRTN8
Power
Stage 1
Power
Stage 2
Power
Stage 3
...
Power
Stage 8
12V
VOUT
Figure 1: IR3563A Basic Application Circuit
DESCRIPTION
The IR3563A is a single-loop digital multi-phase buck
controller that controls up to 8 phases. The IR3563A is
fully Intel® VR12 and VR12.5 compliant.
The IR3563A includes IR’s Efficiency Shaping
Technology to deliver exceptional efficiency at
minimum cost across the entire load range. IR Variable
Gate Drive optimizes the MOSFET gate drive voltage
based on real-time load current. IR’s Dynamic Phase
Control adds/drops phases based upon load current.
The IR3563A can be configured to enter 1-phase
operation and active diode emulation mode
automatically or by command.
IR’s unique Adaptive Transient Algorithm (ATA), based
on proprietary non-linear digital PWM algorithms,
minimizes output bulk capacitors.
The I2C/PMBus interface can communicate with up to
16 IR3563A-based VR loops. Device configuration and
fault parameters are easily defined using the IR Digital
Power Design Center (DPDC) GUI and stored in on-chip
MTP. MTP storage saves pins and enables a small
package size.
The IR3563A provides extensive OVP, UVP, OCP and
OTP fault protection and includes thermistor based
temperature sensing with VRHOT signal.
The IR3563A also includes numerous features like register
diagnostics for fast design cycles and platform
differentiation, simplifying VRD design and enabling fastest
time-to-market with its “set-and-forget” methodology.
PIN DIAGRAM
48 47 46 45 44 43 42 41 40 39 38 37
IRTN 6 1
36 IRTN8
ISEN 6 2
35 ISEN8
RCSP 3
34 NC
RCSM 4
33 VCC
VSEN 5
VRTN 6
RRES 7
TSEN1 8
IR3563A
48 Pin 6x6 QFN
Top View
32 PWM8
31 PWM7
30 PWM6
29 PWM5
V18A 9
VRDY1 10
INMODE/
PWROK
11
VINSEN 12
49 GND
28 PWM4
27 PWM3
26 PWM2
25 PWM1
13 14 15 16 17 18 19 20 21 22 23 24
Figure 2: IR3563A Package Top View
1 August 9, 2012 | FINAL | Product Brief | V2.04