IP2002 Datasheet, PDF (1/12 Pages) International Rectifier – Synchronous Buck Synchronous Buck Integrated Power Semiconductors, Drivers & Passives

PD - 94568A
iP2002
Synchronous Buck
Multiphase Optimized BGA Power Block
Features:
Integrated Power Semiconductors, Drivers & Passives
• Output current 30A continuous with no derating up to
•
T_PCB = 90°C and T_CASE = 90°C
Operating frequency up to 1MHz
• Dual sided heatsink capable
• Very small 11mm x 11mm x 2.6mm profile
• iP2001 footprint compatible
• Internal features minimize layout sensitivity *
• Optimized for very low power losses
iP2002 Power Block
Description
The iP2002 is a fully optimized solution for high current synchronous buck multiphase applications.
Board space and design time are greatly reduced because most of the components required for each
phase of a typical discrete-based multiphase circuit are integrated into a single 11mm x 11mm x 2.6mm
BGA power block. The only additional components required for a complete multiphase converter are a PWM
IC, the external inductors, and the input and output capacitors.
iPOWIR technology offers designers an innovative board space saving solution for applications
requiring high power densities. iPOWIR technology eases design for applications where component
integration offers benefits in performance and functionality. iPOWIR technology solutions are also optimized
internally for layout, heat transfer and component selection.
iP2002 Internal Block Diagram
V_IN
P RDY
ENABLE
MOSFET
PWM
Driver with
dead time
V_SW
V_DD
cont ro l
SGND
P GND
* All of the difficult PCB layout and bypassing issues have been addressed with the internal design of the iPOWIR Block. There are no concerns about double
pulsing, unwanted shutdown, or other malfunctions which often occur in switching power supplies. The iPOWIR Block will function normally without any
additional input power supply bypass capacitors. However, for reliable long term operation it is recommended that at least four 10uF ceramic input
decoupling capacitors are provided to the V_IN pin of each power block. No additional bypassing is required on the V_DD pin.
www.irf.com
03/20/03
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