IP2001PBF Datasheet, PDF (1/10 Pages) International Rectifier – Synchronous Buck Multiphase Optimized BGA Power Block

PD - 97110
iP2001PbF
Synchronous Buck
Multiphase Optimized BGA Power Block
Integrated Power Semiconductors, Drivers & Passives
Features:
• 20A continuous output current with no derating
•
up to T_PCB = 90°C
Very small 11mm
x
11mm
x
3mm
profile
• Internal features minimize layout sensitivity *
• Optimized for very low power losses
• 3.3 to 12V input voltage
Description
iP2001PbF Power Block
The iP2001PbF is a fully optimized solution for high current synchronous buck multiphase applications.
Board space and design time are greatly reduced because most of the components required for each
phase of a typical discrete-based multiphase circuit are integrated into a single 11mm x 11mm x 3mm BGA
power block. The only additional components required for a complete multiphase converter are a PWM IC, the
external inductors, and the input and output capacitors.
iPOWIR technology offers designers an innovative board space saving solution for applications
requiring high power densities. iPOWIR technology eases design for applications where component
integration offers benefits in performance and functionality. iPOWIR technology solutions are also optimized
internally for layout, heat transfer and component selection.
iP2001PbF Internal Block
V_IN
P RDY
ENABLE
MOSFET
PWM
Driver with
dead t ime
V_SW
V_DD
cont rol
SGND
P GND
PACKAGE
DESCRIPTION
iP2001PbF
iP2001TRPbF
INTERFACE
CONNECTION
BGA
BGA
PARTS PER BAG PARTS PER REEL
10
---
---
1000
T&R
ORIENTATION
Fig 12
* All of the difficult PCB layout and bypassing issues have been addressed with the internal design of the iPOWIR Block. There are no concerns about double pulsing,
unwanted shutdown, or other malfunctions which often occur in switching power supplies. The iPOWIR Block will function normally without any additional input power
supply bypass capacitors. However, for reliable long term operation it is recommended that the adequate amount of input decoupling is provided on the V_IN pin. No
additional bypassing is required on the V_DD pin.
www.irf.com
8/11/06
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