CHL8318-20_15 Datasheet, PDF (1/2 Pages) International Rectifier – Digital Multi-Phase Buck Controller

Digital Multi-Phase Buck Controller _CHL8318-20
FEATURES
 Intel VR11.x compliant Digital PWM Controller
 Programmable 1-phase to 8-phase operation
 Customized Digital Over-Clocking features an
easy-to-use SMBus Gamer command and a
Gamer VID control up to 2.3V, Gamer Vmax,
VID Override or Track, Digital Load-Line Adjust,
Gamer OC/OVP, Gamer OFF pin and Gamer OTP
 IR Efficiency Shaping features a Variable Gate Drive
and Dynamic Phase Control
 1-phase to 4-phase PSI for Light Loads
 Adaptive Transient Algorithm minimizes capacitors
 Designed for use with coupled inductors
 Enables Thermal Phase Balancing
 SMBus Fault Indicators: OVP, UVP, OCP, OTP
 SMBus interface for configuring and monitoring;
SMBus commands include monitoring input
current and power
 Compatible with IR ATL Drivers and tri-state Drivers
 9 bytes of NVM storage available for customer use
 +3.3V supply voltage; 0ºC to 85ºC Ambient
operation
 RoHS Compliant, MSL level 1 package
APPLICATIONS
 Intel® VR11.x CPU VRD and VRM; DDR Memory
 High Performance Desktops and Servers
 Over-clocking and High-Efficiency Application
BASIC APPLICATION
DESCRIPTION
The CHL8318-20 is an 8-phase digital synchronous buck
controller for core regulation of high-performance Intel^®
VR11.1 and VR11.0 platforms. The CHL8318-20 is fully
compliant with VR11.1 including Power Status Indicator
(PSI) and for improved light load efficiency and accurate
current output (IMON).
The IR CHL8318-20 includes a customized set of digital
over-clocking features which require no external
components. Gaming applications can use the SMBus
interface to place the VRD into “Gamer Mode” to extend
VID up to 2.3V with 6.25 mV resolution.
The CHL8318-20 deploys a number of efficiency shaping
features such as variable MOSFET gate drive versus load,
programmable PSI modes for optimum light-load along
with programmable phase shedding to autonomously
add/drop phases versus load.
CHL8318-20 supports three NTC temperature sensors to
report temperature and trigger VR HOT and OTP faults.
Digital thermal balancing allows proportional current
imbalance between phases.
The CHL8318-20 provides extensive OVP, UVP, OCP and
OTP fault protection. Device and fault configuration
parameters are easily defined using the IR Power Designer
GUI and stored in on-chip non-volatile memory (NVM).
The 3-pin SMBus interface can be used to monitor a variety
of operating parameters on up to seven CHL8318-20 based
VRs. The controller includes a unique sensorless and
lossless input current monitoring capability.
PIN DIAGRAM
RCSP
RCSM
VCC
VCPU
VRTN
SADDR/
GAMER_OFF
IMON
RRES
VINSEN
TSEN1
TSEN2
TSEN3
EN
V18A
56 55 54 53 52 51 50 49 48 47 46 45 44 43
1
42
2
41
3
40
4
39
5
38
CHL8318-20
6
56 Pin
37
7
8mmx8mm
36
8
QFN
35
9
TOP VIEW
34
10
33
11
GND
32
12
31
13
30
14
29
15 16 17 18 19 20 21 22 23 24 25 26 27 28
IRTN8
ISEN8
VCC
PWM8
PWM7
PWM6
PWM5
PWM4
PWM3
PWM2
PWM1
NC
VCC
VAR_GATE
Figure 1: CHL8318-20 Basic Application Circuit
1 September28, 2011 | FINAL | V1.02
Figure 2: CHL8318-20 Package Top View