CHL8314_15 Datasheet, PDF (1/2 Pages) International Rectifier – Digital Multi-Phase Buck Controller

Digital Multi-Phase Buck Controller _CHL8314
FEATURES
 Intel VR11.x compliant Digital PWM Controller
 Programmable 1-phase to 4-phase operation
 Customized Digital Over-Clocking features an
easy-to-use SMBus Gamer command and a Gamer
VID control up to 2.3V, Gamer Vmax, VID Override
or Track, Digital Load-Line Adjust, Gamer OC/OVP,
Gamer OFF pin and Gamer OTP
 IR Efficiency Shaping features a Variable Gate Drive
and Dynamic Phase Control
 1-phase to 2-phase PSI for Light Loads
 Adaptive Transient Algorithm minimizes capacitors
 Enables Thermal Phase Balancing
 SMBus Fault Indicators: OVP, UVP, OCP, OTP
 SMBus interface for configuring and monitoring;
SMBus commands include monitoring input
current and power
 Compatible with IR ATL Drivers and tri-state drivers
 9 bytes of NVM storage available for customer use
 +3.3V supply voltage; 0ºC to 85ºC Ambient
operation
 RoHS Compliant, MSL level 1 package
APPLICATIONS
 Intel® VR11.x CPU VRD and VRM; DDR Memory
 High Performance Desktops, Servers and
Graphics Cards
 Over-clocking and High-Efficiency Application
DESCRIPTION
The CHL8314 is a 4-phase digital synchronous buck
controller for core regulation of high-performance Intel®
VR11.1 and VR11.0 platforms. The CHL8314 is fully
compliant with VR11.1 including Power Status Indicator
(PSI) and for improved light load efficiency and accurate
current output (IMON).
The CHL8314 includes a customized set of digital over-
clocking features which require no external components.
Gaming applications can use the SMBus interface to place
the VRD into “Gamer Mode” to extend VID up to 2.3V with
6.25 mV resolution.
The CHL8314 deploys a number of efficiency shaping
features such as variable MOSFET gate drive versus load,
programmable PSI modes for optimum light-load along
with programmable phase shedding to autonomously
add/drop phases versus load.
CHL8314 supports NTC temperature sense to report
temperature and trigger VR HOT and OTP faults. Digital
thermal balancing allows proportional current imbalance
between phases.
The CHL8314 provides extensive OVP, UVP, OCP, and
OTP fault protection. Device and fault configuration
parameters are easily defined using the IR Power Designer
GUI and stored in on-chip non-volatile memory (NVM).
The 3-pin SMBus interface can be used to monitor a variety
of operating parameters on up to seven CHL8314 based
VRs. The controller includes a unique sensorless and
lossless input current monitoring capability.
BASIC APPLICATION
PIN DIAGRAM
48 47 46 45 44 43 42 41 40 39 38 37
RCSP 1
RCSM 2
VCC 3
VCPU ₄
VRTN 5
SADDR/
GAMER_OFF
6
IMON 7
RRES 8
VINSEN 9
TSEN 10
EN 11
V18A 12
CHL8314
48 Pin
7mmx 7mm
QFN
TOP VIEW
GND
36 VCC
35 NC
34 NC
33 PWM4
32 PWM3
31 PWM2
30 PWM1
29 NC
28 VCC
27 VAR_GATE
26 VR_HOT
25 VR_READY
13 14 15 16 17 18 19 20 21 22 23 24
Figure 1: CHL8314 Basic Application Circuit
1 October 12, 2011 | FINAL | V1.06
Figure 2: CHL8314 Package Top View