CHL8266 Datasheet, PDF (1/2 Pages) International Rectifier – Digital Multi-Phase GPU Buck Controller GPU-compliant Digital PWM Controller

Digital Multi-Phase GPU Buck Controller _CHL8266
FEATURES
 GPU-compliant Digital PWM Controller
 Programmable 1-phase to 6-phase operation
 Configurable switching frequency from 200 kHz to
1MHz per phase with accuracy better than 2%
 IR Dynamic Phase Control
 1-phase to 2-phase PSI for Light Loads
 Adaptive Transient Algorithm minimizes output
bulk capacitors
 Enables Thermal Phase Balancing
 SMBus interface for configuring and monitoring
 Compatible with IR ATL Drivers and
Tri-state Drivers
 Nine bytes of NVM storage available for
customer use
 +3.3V supply voltage; 0ºC to 85ºC Ambient
operation
 RoHS Compliant, MSL level 1 package
APPLICATIONS
 High performance GPU Voltage
Regulation solutions
 High Current and High-Efficiency Applications
DESCRIPTION
The CHL8266 is a 6-phase digital synchronous buck
controller for regulation of high-performance GPU
platforms. The CHL8266 output VID table is fully compliant
with VR11.1 specifications.
The CHL8266 deploys a number of efficiency shaping
features. PSI can be programmed to be up to four phases
for optimum light-load efficiency, and the controller can
autonomously add/drop phases from mid to high and back
to mid current ranges to deliver 90+% efficiency across the
entire load range.
IR’s unique Adaptive Transient Algorithm, based on non-
linear digital PWM algorithms, minimizes output bulk
capacitors.
CHL8266 supports NTC temperature sense to report
temperature and trigger VR HOT and OTP faults. Digital
thermal balancing allows proportional current imbalance
between phases.
The CHL8266 provides extensive OVP, UVP, OCP and OTP
fault protection. Device and fault configuration parameters
are easily defined using the IR Digital Power Design Center
(DPDC) GUI and stored in on-chip non-volatile memory
(NVM).
The 2-pin SMBus interface can be used to monitor a variety
of operating parameters on CHL8266 based VRs.
The CHL8266 truly simplifies VRD design and enables
fastest time-to-market with its “set-and-forget”
methodology.
BASIC APPLICATION
VR_RDY
VR_HOT#
ENABLE
SV_CLK
SV_DIO
3.3V
CHL8266
VR_RDY PWM1
ISEN1
VR_HOT# ^IRTN1
ENABLE
SCL
PWM2
ISEN2
IRTN2
SDA
PWM4
ISEN4
IRTN4
VCC
PWM1_L2
ISEN1_L2
IRTN1_L2
Power
Stage 1
Power
Stage 2
...
Power
Stage 5
Power
Stage 6
12V
V_GPU
Figure 1: CHL8266 Basic Application Circuit
1 October 12, 2011 | FINAL | V1.05
PIN DIAGRAM
48 47 46 45 44 43 42 41 40 39 38 37
RCSP 1
RCSM 2
VCC 3
VGPU ₄
VRTN 5
SADDR 6
TP2 7
RRES 8
VINSEN 9
TSEN 10
EN 11
V18A 12
CHL8266
48 Pin
7mmx 7mm
QFN
TOP VIEW
GND
36 VCC
35 PWM6
34 PWM5
33 PWM4
32 PWM3
31 PWM2
30 PWM1
29 NC
28 VCC
27 NC
26 VR_HOT
25 VR_READY
13 14 15 16 17 18 19 20 21 22 23 24
Figure 2: CHL8266 Package Top View