ISL6218 Datasheet, PDF (9/19 Pages) Intersil Corporation – Precision Single-Phase Buck PWM Controller for Intel Mobile Voltage Positioning IMVP-IV and IMVP-IV+

ISL6218
The choice of value for soft-start capacitor is determined by
the maximum slew rate required for the application. An
example calculation is shown in Equation 1. Using the I1
current source on the SOFT pin as 130µA, and the slew rate
of (10mV/μs), the SOFT capacitor is calculated in Equation 1:
C_SOFT
=
I_SOURCE
SlewRate
= 130µA ⋅ ^1µs
10mV
≈ 0.012µF
(EQ. 1)
Gate Drive Signals
The ISL6218 provides internal gate drive for a single
channel, Synchronous Buck, Core Regulator.
The ISL6218 was designed with a 4A, low side gate current
sink ability, and a 2A, low-side gate current source ability to
efficiently drive the latest, high performance MOSFETs. This
feature will provide the system designer with flexibility in
MOSFET selection as well as optimum efficiency during all
modes of operation.
Frequency Setting
The power channel switching frequency is set up by a
resistor from the FSET pin to ground. The choice of FSET
resistance for a desired switching frequency can be
approximated using Figure 3. The switching frequency is
designed to operate between 250kHz and 500kHz per
phase.
CORE Voltage Programming
The voltage identification pins (VID0, VID1, VID2, VID3,
VID4 and VID5) set the DAC output voltage. These pins do
not have internal pull-up or pull-down capability. These pins
will recognize 1.0V, 3.3V or 5.0V CMOS logic. Table 1 shows
the command voltage, V_DAC for the 6 bit VID codes.
The IC responds to VID code changes as shown in Figure 5.
PGOOD is masked between these transitions.
250
200
150
100
50
0
250k
500k
750k
1M
CHANNEL SWITCHING FREQUENCY, f_SW (Hz)
FIGURE 3. CHANNEL SWITCHING FREQUENCY vs R_FSET
ISL6218
I_DROOP
ERROR
AMPLIFIER
+
SOFT
R_DROOP
+ V_DROOP
C_SOFT
EA+
FIGURE 4. SOFT-START TRACKING CIRCUITRY SHOWING
INTERNAL CURRENT SOURCES AND “DROOP”
FOR ACTIVE, DEEP AND DEEPER SLEEP
MODES OF OPERATION
VID5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TABLE 1. INTEL IMPV-IV VID CODES
VID4 VID3 VID2 VID1 VID0
VDAC
0
0
0
0
0
1.708
0
0
0
0
1
1.692
0
0
0
1
0
1.676
0
0
0
1
1
1.660
0
0
1
0
0
1.644
0
0
1
0
1
1.628
0
0
1
1
0
1.612
0
0
1
1
1
1.596
0
1
0
0
0
1.580
0
1
0
0
1
1.564
0
1
0
1
0
1.548
0
1
0
1
1
1.532
0
1
1
0
0
1.516
0
1
1
0
1
1.500
0
1
1
1
0
1.484
0
1
1
1
1
1.468
1
0
0
0
0
1.452
1
0
0
0
1
1.436
1
0
0
1
0
1.420
1
0
0
1
1
1.404
9
FN9101.6
August 6, 2007