ISL59444 Datasheet, PDF (9/11 Pages) Intersil Corporation – 1GHz, 4 x 1 Multiplexing Amplifier with Synchronous Controls

Application Circuits
V_IN
50Ω
ISL59444
*C_L = C_T + C_OUT
-
V_OUT
+
C_T
1.6pF
C_OUT
0pF
R_L = 500Ω
*C_L: TOTAL LOAD CAPACITANCE
C_T: TRACE CAPACITANCE
C_OUT: OUTPUT CAPACITANCE
FIGURE 22A. SMALL SIGNAL 200mV_P-P APPLICATION CIRCUIT
V_IN
50Ω
R_S
-
25Ω
V_OUT
+
1.6pF ^CT
C_OUT
R_L = 500Ω
22pF
C_L = C_T + C_OUT
FIGURE 22B. LARGE SIGNAL 1V_P-P APPLICATION CIRCUIT
Application Information
General
The ISL59444 is a 4:1 mux that is ideal as a matrix element
in high performance switchers and routers. The ISL59444 is
optimized to drive a 2pF in parallel with a 500Ω load. The
capacitance can be split between the PCB capacitance an
and external load capacitance. Their low input capacitance
and high input resistance provide excellent 50Ω or 75Ω
terminations.
Capacitance at the Output
The output amplifier is optimized for capacitance to ground
(C_L) directly on the output pin. Increased capacitance
causes higher peaking with an increase in bandwidth. The
optimum range for most applications is ~1.0pF to ~6pF. The
optimum value can be achieved through a combination of
PC board trace capacitance (C_T) and an external capacitor
(C_OUT). A good method to maintain control over the output
pin capacitance is to minimize the trace length (C_T) to the
next component, and include a discrete surface mount
capacitor (C_OUT) directly at the output pin.
For large signal applications where overshoot is important
the circuit in Figure 22B should be used. The series resistor
(R_S) and capacitor (C_L) form a low pass network that limits
system bandwidth and reduces overshoot. The component
values shown result in a typical pulse response shown in
Figure 18.
Ground Connections
For the best isolation and crosstalk rejection, the GND pin
and NIC pins must connect to the GND plane. The NIC pins
are placed on both sides of the input pins. These pins are
not internally connected to the die. It is recommended this
pin be tied to ground to minimize crosstalk.
Control Signals
S0, S1, HIZ - These pins are, TTL/CMOS compatible control
inputs. The S0, S1 pins select which one of the inputs
connect to the output. The HIZ pin is used to three-state the
output amplifiers. For control signal rise and fall times less
than 10ns the use of termination resistors close to the part
will minimize transients coupled to the output.
HIZ State
An internal pull-down resistor connected to the HIZ pin
ensures the device will be active with no connection to the
HIZ pin. The HIZ state is established within approximately
30ns by placing a logic high (>2V) on the HIZ pin. If the HIZ
state is selected, the output is a high impedance 1.4MΩ. Use
this state to control the logic when more than one mux
shares a common output.
In the HIZ state the output is three-stated, and maintains its
high Z even in the presence of high slew rates. The supply
current during this state is basically the same as the active
state.
9
FN7451.1
September 21, 2005