ISL24211 Datasheet, PDF (9/12 Pages) Intersil Corporation – Programmable VCOM Calibrator with EEPROM and Output Buffer

ISL24211
Start EEPROM
Programming
Erase Pulse
Are EEPROM
No
Cells Erased?
Yes
Write Pulse
Are
No
EEPROM Cells
Programmed?
Yes
EEPROM
Programming
Complete
FIGURE 9. EEPROM PROGRAMMING FLOWCHART
ISL24211 Programming
The ISL24211 accepts I²C bus address and data when the WP
pin is high. The ISL24211 ignores the I²C bus when the WP pin is
low. Figure 10 shows the serial data format for writing the
register and programming the EEPROM. Figure 11 shows the
serial data format for reading the DAC register. Table 2 shows the
truth table for reading and writing the device.
TABLE 2. ISL24211 READ AND WRITE CONTROL
WP PIN
R/W
P
FUNCTION
0
1
X
Read Register.
0
0
1
Will acknowledge I²C
transactions. Will not write to
register.
0
0
0
Will acknowledge I²C
transactions. Will not write to
EEPROM.
1
1
X
Read DAC Register.
1
0
1
Write DAC Register.
1
0
0
Program EEPROM.
Programming the EEPROM memory transfers the current DAC
register value to the EEPROM and occurs when the control bits
select the programming mode and the AV_DD voltage is >10.8V.
After the EEPROM programming cycle is started, the WP pin can
be returned to logic low while the EEPROM write completes,
which takes a maximum of 100ms.
The ISL24211 uses a 6-bit I²C address, which is “100111yx” for
the first transmitted byte. Bit x is the R/W bit, and Bit y is the LSB
(D0) of the DCP register code to be written. The complete read
and write protocol is shown in Figures 10 and 11.
I²C Bus Signals
The ISL24211 uses fixed voltages for its I²C thresholds, rather
than the percentage of V_DD described in the I²C specification
(see Table 3). This should not cause a problem in most systems,
but the I²C logic levels in a specific design should be checked to
ensure they are compatible with the ISL24211.
TABLE 3. ISL24211 I²C BUS LOGIC LEVELS
SYMBOL
ISL24211
I²C STANDARD
V_{IL_I2C}
V_{IH_I2C}
0.55V
1.44V
0.3*V_DD
0.7*V_DD
9
FN7585.0
February 23, 2011