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CD4011BMS Datasheet, PDF (9/9 Pages) Intersil Corporation – CMOS NAND Gates
CD4011BMS, CD4012BMS, CD4023BMS
Typical Performance Characteristics (Continued)
200 AMBIENT TEMPERATURE (TA) = +25oC
175
AMBIENT TEMPERATURE (TA) = +25oC
150 SUPPLY VOLTAGE (VDD) = 5V
125
100
10V
75
50
15V
25
0
10 20 30 40 50 60 70 80 90 100
LOAD CAPACITANCE (CL) (pF)
FIGURE 7. TYPICAL PROPAGATION DELAY TIME PER GATE
AS A FUNCTION OF LOAD CAPACITANCE
200
SUPPLY VOLTAGE (VDD) = 5V
150
100
10V
15V
50
0
0
20
40
60
80
100
LOAD CAPACITANCE (CL) (pF)
FIGURE 8. TYPICAL TRANSITION TIME AS A FUNCTION OF
LOAD CAPACITANCE
Chip Dimensions and Pad Layouts
CD4011BMSH
CD4012BMSH
METALLIZATION: Thickness: 11kÅ − 14kÅ, AL.
PASSIVATION: 10.4kÅ - 15.6kÅ, Silane
BOND PADS: 0.004 inches X 0.004 inches MIN
DIE THICKNESS: 0.0198 inches - 0.0218 inches
Dimensions in parentheses are in millimeters
and are derived from the basic inch dimensions
as indicated. Grid graduations are in mils (10-3 inch)
CD4023BMSH
7-61