ISL6744 Datasheet, PDF (8/18 Pages) Intersil Corporation – Intermediate Bus PWM Controller

ISL6744
Soft-Start Operation
The ISL6744 features a soft-start using an external capacitor
in conjunction with an internal current source. Soft-start
reduces stresses and surge currents during start-up.
The oscillator capacitor signal, C_T, is compared to the
soft-start voltage, SS, in the SS comparator which drives the
PWM latch. While the SS voltage is less than 3.5V, duty
cycle is limited. The output pulse width increases as the
soft-start capacitor voltage increases up to 3.5V. This has
the effect of increasing the duty cycle from zero to the
maximum pulse width during the soft-start period. When the
soft-start voltage exceeds 3.5V, soft-start is completed.
Soft-start occurs during start-up and after recovery from an
overcurrent shutdown. The soft-start voltage is clamped
to 4V.
Gate Drive
The ISL6744 is capable of sourcing and sinking 1A peak
current, and may also be used in conjunction with a
MOSFET driver such as the ISL6700 for level shifting. To
limit the peak current through the IC, an external resistor
may be placed between the totem-pole output of the IC
(OUTA or OUTB pin) and the gate of the MOSFET. This
small series resistor also damps any oscillations caused by
the resonant tank of the parasitic inductances in the traces of
the board and the FET’s input capacitance.
Overcurrent Operation
Overcurrent delayed shutdown is enabled once the soft-start
cycle is complete. If an overcurrent condition is detected, the
soft-start charging current source is disabled and the soft-
start capacitor is allowed to discharge through a 15µA
source. At the same time a 50µs retriggerable one-shot timer
is activated. It remains active for 50µs after the overcurrent
condition ceases. If the soft-start capacitor discharges to
3.9V, the output is disabled. This state continues until the
soft-start voltage reaches 270mV, at which time a new soft-
start cycle is initiated. If the overcurrent condition stops at
least 50µs prior to the soft-start voltage reaching 3.9V, the
soft-start charging currents revert to normal operation and
the soft-start voltage is allowed to recover.
Thermal Protection
An internal temperature sensor protects the device should
the junction temperature exceed 145°C. There is
approximately 15°C of hysteresis.
Ground Plane Requirements
Careful layout is essential for satisfactory operation of the
device. A good ground plane must be employed. V_DD should
be bypassed directly to GND with good high frequency
capacitance.
Typical Application
The Typical Application Schematic features the ISL6744 in
an unregulated half-bridge DC/DC converter configuration,
often referred to as a DC Transformer or Bus Converter.
The input voltage is 48V ±10% DC. The output is a nominal
12V when the input voltage is at 48V. Since this is an
unregulated topology, the output voltage will vary
proportionately with input voltage. The load regulation is a
function of resistance between the source and the converter
output. The output is rated at 8A.
Circuit Elements
The converter design is comprised of the following functional
blocks:
Input Filtering: L1, C1, R1
Half-Bridge Capacitors: C2, C3
Isolation Transformer: T1
Primary Snubber: C13, R10
Start Bias Regulator: CR3, R2, R7, C6, Q5, D1
Supply Bypass Components: C15, C4
Main MOSFET Power Switch: QH, QL
Current Sense Network: T2, CR1, CR2, R5, R6, R11, C10,
C14
Control Circuit: U1, C18, C16, D2
Output Rectification and Filtering: QR1, QR2, QR3, QR4,
L2, C9, C8
Secondary Snubber: R8, R9, C11, C12
FET Driver: U4
Bootstrap components for driver: CR4, C5
ZVS Resonant Delay (Optional): L3, C7
Design Specifications
The following design requirements were selected for
evaluation purposes:
Switching Frequency, Fsw: 235kHz
V_IN: 48 ± 10% V
V_OUT: 12V (nominal)
I_OUT: 8A (steady state)
P_OUT: 100W
Efficiency: 95%
Ripple: 1%
8
FN9147.8
September 22, 2005