ISL6722A_15 Datasheet, PDF (8/26 Pages) Intersil Corporation – Flexible Single Ended Current Mode PWM Controllers

ISL6722A, ISL6723A
Electrical Specifications
Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application
schematic. 9V < V_CC = V_C < 20V, Rt = 11k, Ct = 330pF, T_A = -40°C to +105°C (Note 4),
Typical values are at T_A = +25°C (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
SLOPE COMPENSATION
Charge Current
Slope Compensation Gain
Discharge Voltage
GATE OUTPUT
SLOPE = 2V, T_A = 0 to +105°C
-45
-53
-65
A
T_A = -40°C to +105°C
-41
-53
-65
Fraction of slope voltage added to
0.097
-
0.103
V/V
I_SENSE, T_A = +25°C
Fraction of slope voltage added to
0.082
-
0.118
V/V
I_SENSE (Note 4)
V_RTCT = 4.5V
-
0.1
0.2
V
Gate Output Limit Voltage
Gate VOH
Gate VOL
V_C = 20V, C_GATE = 1nF,
I_OUT = 0mA
11.0
13.5
16.0
V
V_C - GATE, V_C = 10V,
I_OUT = 150mA
-
1.5
2.2
V
GATE - PGND, IOUT = 150mA
-
1.2
1.5
V
IOUT = 10mA
0.6
0.8
Peak Output Current
V_C = 20V, C_GATE = 1nF
(Note 6)
-
1.0
-
A
Output “Faulted” Leakage
Rise Time
V_C = 20V, UV = 0V, GATE = 2V
1.2
2.6
-
mA
V_C = 20V, C_GATE = 1nF
1V < GATE < 9V
-
60
100
ns
Fall Time
V_C = 20V, C_GATE = 1nF
1V < GATE < 9V
-
15
40
ns
Minimum ON time
ISET = 0.5V; V_FB = 0V; VC = 11V
-
ISENSE to GATE w/10:1 Divider
RTCT = 4.75V through 1k
(Note 6)
-
110
ns
OVERCURRENT PROTECTION
Minimum ISET Voltage
-
-
0.35
V
Maximum ISET Voltage
1.2
-
-
V
ISET Bias Current
Restart Delay
OV AND UV VOLTAGE MONITOR
V_ISET = 1.00V
T_A = +25°C
-1.0
-
1.0
A
150
295
445
ms
Overvoltage Threshold
2.4
2.5
2.6
V
Undervoltage Fault Threshold
1.38
1.45
1.52
V
Undervoltage Clear Threshold
1.41
1.53
1.62
V
Undervoltage Hysteresis Voltage
20
50
100
mV
UV Bias Current
OV Bias Current
SLEEP (ISL6722A)
V_UV = 2.00V
V_OV = 2.00V
-1.0
-
1.0
A
-1.0
-
1.0
A
SLEEP Input Threshold Voltage
Active High
1.4
-
2.7
V
SLEEP Input Current
I_CC @ SLEEP
V_SLEEP = 4.0V
V_CC = 15V
11
25
46
A
-
175
210
A
8
FN9237.2
September 29, 2015