ISL59445_14 Datasheet, PDF (8/14 Pages) Intersil Corporation – 1GHz Triple Multiplexing Amplifiers

ISL59424, ISL59445
Pin Descriptions
ISL59445
(32-LD QFN)
1
2, 4, 8, 13, 15,
24, 28, 30
3
5
6
7
9
10
11
12
14
16
17
18
19
20
21
22
23
25
26
27
29
31
32
ISL59424
(24-LD QFN)
5
2, 8, 10, 11,
21, 22
7
9
4
6
13
14
16
15
18
17
19
12
20
3
1
23
24
PIN
NAME
IN1A
NIC
IN1B
IN1C
GNDB
IN2A
IN2B
IN2C
GNDC
IN3A
IN3B
IN3C
S1
S0
OUTC
OUTB
V-
OUTA
V+
ENABLE
LE
HIZ
IN0C
IN0B
IN0A
GNDA
EQUIVALENT
CIRCUIT
DESCRIPTION
Circuit 1 Channel 1 input for output amplifier "A"
-
Not Internally Connected; it is recommended these pins be tied to ground to
minimize crosstalk.
Circuit 1 Channel 1 input for output amplifier "B"
Circuit 1 Channel 1 input for output amplifier "C"
Circuit 4 Ground pin for output amplifier “B”
Circuit 1 Channel 2 input for output amplifier "A"
Circuit 1 Channel 2 input for output amplifier "B"
Circuit 1 Channel 2 input for output amplifier "C"
Circuit 4 Ground pin for output amplifier “C”
Circuit 1 Channel 3 input for output amplifier "A"
Circuit 1 Channel 3 input for output amplifier "B"
Circuit 1 Channel 3 input for output amplifier "C"
Circuit 2 Channel selection pin MSB (binary logic code)
Circuit 2 Channel selection pin. LSB (binary logic code)
Circuit 3 Output of amplifier “C”
Circuit 3 Output of amplifier “B”
Circuit 4 Negative power supply
Circuit 3 Output of amplifier “A”
Circuit 4 Positive power supply
Circuit 2
Device enable (active low). Internal pull-down resistor ensures the device will be
active with no connection to this pin. A logic High on this pin puts device into
power-down mode. In power-down mode only logic circuitry is active. All logic
states are preserved post power-down. This state is not recommended for logic
control where more than one MUX-amp share the same video output line.
Circuit 2
Device latch enable on the ISL59424. A logic high on LE will latch the last (S0, S1)
logic state. HIZ and ENABLE functions are not latched with the LE pin.
Circuit 2
Output disable (active high). Internal pull-down resistor ensures the device will be
active with no connection to this pin. A logic high, puts the outputs in a high
impedance state. Use this state to control logic when more than one MUX-amp
share the same video output line.
Circuit 1 Channel 0 for output amplifier "C"
Circuit 1 Channel 0 for output amplifier "B"
Circuit 1 Channel 0 for output amplifier "A"
Circuit 4 Ground pin for output amplifier “A”
V+
V+
IN
LOGIC PIN
21k +
1.2V
33k
-
GND
V-
V-
CIRCUIT 1
CIRCUIT 2
V+
OUT
V-
CIRCUIT 3
V+
GNDA
GND
GNDC
V-
.
CAPACITIVELY
COUPLED
ESD CLAMP
CIRCUIT 4
8
THERMAL HEAT SINK PAD
V-
~1MΩ
SUBSTRATE
FN7456.3
September 30, 2011