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ISL54230 Datasheet, PDF (8/16 Pages) Intersil Corporation – Octal Multiprotocol Switch
ISL54230
Test Circuits and Waveforms (Continued)
DIN+
DIN-
OUT+
OUT-
tri
10%
90%
50%
90%
tskew_i
50%
10%
tfi
tro
90%
10%
90%
50%
tskew_o
50%
tf0
10%
VDD C
VINx
DIN+
DIN-
15.8Ω
143Ω
15.8Ω
143Ω
INx
COM2A
NO2A
OR NC2A
COM2B
NO2B
OR NC2B
OUT+
CL
45Ω
OUT-
CL
45Ω
GND
|tro - tri| Delay Due to Switch for Rising Input and Rising Output Signals.
|tfo - tfi| Delay Due to Switch for Falling Input and Falling Output Signals
|tskew_0| Change in Skew through the Switch for Output Signals.
|tskew_i| Change in Skew through the Switch for Input Signals.
FIGURE 6A. MEASUREMENT POINTS
FIGURE 6. SKEW TEST
FIGURE 6B. TEST CIRCUIT
Detailed Description
The ISL54230 is a multiprotocol switch containing eight
switches configured as a Quad DPDT. Each DPDT switch is
independently controlled by a logic pin. The ISL54230 has
four switches that are compliant in passing USB2.0 signals
and four switches with low rON that can be used to pass
analog or digital signals such as audio or UART. It is offered
in a 32 Ld 5x5mm TQFN package for applications which
require small package size such as cellphones and PDAs.
The ISL54230 contains four switches capable of passing
USB2.0 Full-Speed and High-Speed signals with minimal
distortion, two 1Ω switches and two 6Ω switches for
analog/digital signals. The USB capable switches were
designed with low capacitance and high bandwidth to pass
USB HS signals (480Mbps) with minimal edge and phase
distortion. The 1Ω switches are designed for passing low
bandwidth signals (<8MHz) and are ideal for switching
power lines since the low ON-resistance minimizes power
dissipation. The 6Ω switches are designed to pass audio or
data signals up to 100MHz while maintaining a low rON for
good THD performance.
In addition to the four independent logic control pins that
control each DPDT switch, the ISL54230 contains two
Output Enable (OE) logic pins that permits the IC to disable
certain switches giving the user a high degree of flexibility in
signal routing. Please see “OE Control Truth Table” on
page 3 for an explanation of the OE pins. All logic pins on
the ISL54230 are 1.8V logic compatible up to a +3.3V
supply.
Power Supply Considerations
The power supply connected to the VDD and GND pins
provides the DC bias voltage necessary to operate the IC.
The ISL54230 can be operated with a supply voltage in the
range of +2.0V to +5.5V. For USB applications the supply
voltage should be in the range of +3.0V to +5.5V to ensure
proper signal levels on the USB data lines.
A decoupling capacitor in the range 0.01µF to 0.1µF should
be connected to the VDD supply pin of the IC to filter out any
power supply noise that may be present on the supply lines.
The capacitor should be place as closed as possible to the
VDD pin.
Supply Sequencing and Power-On Reset
Protection
Proper power supply sequencing is necessary to protect the
ISL54230 from operating in fault conditions. The ISL54230
integrates Power-On Reset (POR) circuitry that prevents the
switches from turning ON until the supply voltage is at least
+1.4V. The POR has a 100mV hysteresis built in that will turn
the switches OFF when the supply has gone below +1.3V.
This function prevents signals from the switch input being
passed to the output when the device operating voltage has
not reached appropriate levels yet, protecting the switch
from fault conditions.
The POR circuitry also protects the switch from operating in
a fault condition should the power supply to the IC drop
below the POR threshold. Thus, the recommended
operational supply voltage is within +2.0V to +5.5V.
Operating at supply voltages below +2.0V may still be
functional but the noise margin between the POR threshold
8
FN6825.0
December 26, 2008