ISL54065_09 Datasheet, PDF (8/15 Pages) Intersil Corporation – +1.8V to +6.5V, Sub-ohm, Click and Pop Elimination, Dual SPDT w/ Enable, Analog Switch with Negative Signal Capability

ISL54065
Test Circuits and Waveforms (Continued)
*50Ω SOURCE
V+
C
SIGNAL
GENERATOR
NO OR NC
ANALYZER
R_L
IN 0V OR V+
COM
GND
r_ON = V₁/100mA
NO OR NC
V_NX
100mA
V₁
V+
C
0V OR V+
IN
COM
GND
Signal direction through switch is reversed, worst case values
are recorded.
FIGURE 4. OFF-ISOLATION TEST CIRCUIT
*50Ω SOURCE
SIGNAL
GENERATOR
V+
C
NO1 OR NC1 _COM1
R_L
IN_X
0V OR V+
ANALYZER
COM2
NC2 OR NO2
NC
GND
50Ω
Signal direction through switch is reversed, worst case values
are recorded.
FIGURE 6. CROSSTALK TEST CIRCUIT
FIGURE 5. r_ON TEST CIRCUIT
IMPEDANCE
ANALYZER
V+
C
NO OR NC
IN 0V OR V+
COM
GND
COM is connected to NO or NC
during ON capacitance measurement.
FIGURE 7. CAPACITANCE TEST CIRCUIT
INx
VDC
0V
V_INx*
0V
t_D
t_D
*V_INx waveform for Click and Pop Elimination on NOx terminal.
For Click and Pop Elimination on NCx terminal invert INx.
t_D = 200ms measured at 50% points.
VDC
VDC
220µF NCx
CLICK AND POP
CIRCUITRY
220µF
NOx
COMx
R_L
FIGURE 8A. CLICK AND POP WAVEFORM
FIGURE 8B. CLICK AND POP TEST CIRCUIT
FIGURE 8. CLICK AND POP ELIMINATION
8
FN6583.1
April 3, 2009