ISL54060 Datasheet, PDF (8/15 Pages) Intersil Corporation – +1.8V to +6.5V, Sub-ohm, Dual SPST Analog Switch with Negative Signal Capability

ISL54060, ISL54061
Test Circuits and Waveforms
V+
LOGIC
INPUT
0V
50%
t_OFF
t_r < 5ns
t_f < 5ns
SWITCH
INPUT
V_NO
SWITCH
OUTPUT _0V
V_OUT
90%
t_ON
90%
Logic input waveform is inverted for switches that have the opposite
logic sense.
V+
C
SWITCH
INPUT
LOGIC
INPUT
NO OR NC
IN
GND
COM
V_OUT
R_L
C_L
50Ω 35pF
Repeat test for all switches. C_L includes fixture and stray
capacitance.
V_OUT
=
V(NO _{or NC)}
---------^R-----^L---------
R_L + r_ON
FIGURE 1A. MEASUREMENT POINTS
FIGURE 1. SWITCHING TIMES
FIGURE 1B. TEST CIRCUIT
V+
C
SWITCH
OUTPUT
V_OUT
LOGIC ^ON
INPUT
ΔV_OUT
OFF
V+
ON
0V
R_G
NO OR NC
COM
V_G
GND
IN
LOGIC
INPUT
V_OUT
C_L
Q = ΔV_OUT x C_L
FIGURE 2A. MEASUREMENT POINTS
Repeat test for all switches.
FIGURE 2B. TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
*50Ω SOURCE
SIGNAL
GENERATOR
V+
C
NO OR NC
r_ON = V₁/100mA
V+
C
NO OR NC
ANALYZER
R_L
IN 0V OR V+
COM
GND
V_NX
100mA
0V OR V+
V₁
IN
COM
GND
Signal direction through switch is reversed, worst case values
are recorded. Repeat test for all switches.
FIGURE 3. OFF-ISOLATION TEST CIRCUIT
Repeat test for all switches.
FIGURE 4. r_ON TEST CIRCUIT
8
FN6580.0
December 19, 2008