ISL29033 Datasheet, PDF (8/15 Pages) Intersil Corporation – Simple output code directly proportional to lux

ISL29033
I²C DATA
I²C SDA IN
I²C SDA OUT
I²C CLK IN
START
DEVICE ADDRESS
W A REGISTER ADDRESS
A
FUNCTIONS
A STOP
A6 A5 A4 A3 A2 A1 A0 W A R7 R6 R5 R4 R3 R2 R1 R0 A B7 B6 B5 B4 B3 B2 B1 B0 A
SDA DRIVEN BY MASTER
A
SDA DRIVEN BY MASTER
A
SDA DRIVEN BY MASTER
A
1 234 5 67 8 9 1234 56 7 8 9 12 345 67 89
FIGURE 4. I²C WRITE TIMING DIAGRAM SAMPLE
ADDR
00h
01h
02h
03h
04h
05h
06h
07h
REG NAME
COMMANDI
COMMANDII
DATA_LSB
DATA_MSB
INT_LT_LSB
INT_LT_MSB
INT_HT_LSB
INT_HT_MSB
7
OP2
0
D7
D15
TL7
TL15
TH7
TH15
6
OP1
0
D6
D14
TL6
TL14
TH6
TH14
TABLE 1. REGISTER SET
BIT
5
4
3
OP0
0
0
0
0
RES1
D5
D4
D3
D13
D12
D11
TL5
TL4
TL3
TL13
TL12
TL11
TH5
TH4
TH3
TH13
TH12
TH11
2
FLAG
RES0
D2
D10
TL2
TL10
TH2
TH10
1
PRST1
RANGE 1
D1
D9
TL1
TL9
TH1
TH9
0
PRST0
RANGE 0
D0
D8
TL0
TL8
TH0
TH8
DEFAULT
00h
00h
00h
00h
00h
00h
FFh
FFh
Register Set
There are eight registers available in the ISL29033. Table 1
summarizes their functions.
Command Register I 00 (Hex)
The first command register has the following functions:
1. Operation Mode: Bits 7, 6 and 5. These three bits determine
the operation mode of the device (Table 2).
2. Interrupt flag: Bit 2. This is the status bit of the interrupt
(Table 3). The bit is set to logic high when the interrupt
thresholds have been triggered (out of threshold window) and
to logic low when not yet triggered. When activated and the
interrupt is triggered, the INT pin goes low and the interrupt
status bit goes high until the status bit is polled through the
I²C read command. Both the INT output and the interrupt
status bit are automatically cleared at the end of the 8-bit
(00h) command register transfer.
3. Interrupt Persist: Bits 1 and 0. The interrupt pin and the
interrupt flag are triggered or set when the data sensor
reading is out of the interrupt threshold window after m
consecutive number of integration cycles (Table 4 on page 9).
The interrupt persist bits determine m.
BITS 7 TO 5
000
001
010
100
101
110
111
TABLE 2. OPERATION MODE
OPERATION
Power-down the device
Reserved (do not use)
Reserved (do not use)
Reserved (do not use)
ALS continuous
IR continuous
Reserved (do not use)
BIT 2
0
1
TABLE 3. INTERRUPT FLAG
OPERATION
Interrupt is cleared or not triggered yet
Interrupt is triggered
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8
FN7656.5
September 28, 2016