ISL28915 Datasheet, PDF (8/10 Pages) Intersil Corporation – Nano Power, Push/Pull Output Comparator

ISL28915
Applications Information
Introduction
The ISL28915 is a CMOS rail-to-rail input and output (RRIO)
nanopower comparator. This device is designed to operate from
single supply (1.8V to 5.5V) and have an input common mode
range that extends to the positive rail and to the negative supply
rail for true rail-to-rail performance. The CMOS output can swing
within tens of millivolts to the rails. Featuring worst case
maximum supply current of only 900nA, this comparator is
ideally suited for solar and battery powered applications.
Input Protection
All input terminals have internal ESD protection diodes to both
positive and negative supply rails, limiting the input voltage to
within one diode beyond the supply rails. The ISL28915 has a
maximum input differential voltage that extends beyond the rails
(V+ + 0.5V to GND - 0.5V).
Rail-to-Rail Output
A pair of complementary MOSFET devices are used to achieve
the rail-to-rail output swing. The NMOS sinks current to swing the
output in the negative direction. The PMOS sources current to
swing the output in the positive direction. The ISL28915 with a
10kΩ load will typically swing to within 10mV of the positive
supply rail and within 35mV of ground.
Break-Before-Make Operation of the Output
The output circuit has a break-before-make response. This
means that the P-Channel turns off before the N-Channel turns
on during a high to low transition of the output (reference
Figure 24). Likewise, the N-Channel turns off before the
P-Channel turns on during a low to high transition. This results in
different propagation delay times depending upon where the
output load resistor is tied to. If the load resistor is tied to ground
(Figure 25A), then the propagation delay is controlled by the
P-Channel. For a high to low transition, the propagation delay
does not include the additional break-before-make time because
the load resistor will pull the output low once the P-Channel has
turned off.
BREAK-BEFORE-MAKE
ISL28915
OUTPUT STAGE
V+
P-CHANNEL
VOUT
N-CHANNEL
FIGURE 24. MAKE-BEFORE-BREAK ACTION OF THE OUTPUT STAGE
During the low to high transition, however, if the load resistor is
tied to ground, then the additional break-before-make time is
added to the propagation delay time because the output won’t
pull high until the P-Channel turns on.
V+
+
-
V_OUT
R_L
FIGURE 25A. R_L TO GND
V+
R_L
+
-
V_OUT
FIGURE 25B. R_L TO V+
FIGURE 25. CONNECTION OF R_L TO GND AND V+
If the load resistor is tied to V+ (Figure 25B), then the
propagation delay is controlled by the N-Channel. For this
condition, the additional delay time is added to the high to low
transition because the output won’t pull low until the N-Channel
turns on. Figures 4 through 7 show the differences in
propagation delay depending upon where the load is tied.
Propagation Delay
The input to output propagation delay has a dependency on
power supply voltage, overdrive and whether the output is
sourcing or sinking current. Figures 4 and 5 show a decreasing
time propagation delay vs supply voltage for the ISL28915. The
output break-before-make mechanism results in a difference in
propagation delay, depending on whether the output stage
NMOS and PMOS are sourcing or sinking current. This delay
difference is shown in the figures as a function of where the load
is terminated (V+ or GND) and also as a function of supply
voltage. The dependence of propagation delay as a function of
power supply voltage and input overdrive (from 5mV to 1V) is
shown in Figures 6 and 7. Propagation delay is measured from
the time the input signal reached 50% of its final value to the
time the output reaches 50% of its final value. Rise and fall times
are measured from the time the signal is at 20% of its final value
to the time it reaches 80% of the final value.
Enable Feature
The ISL28915 in the 6 Ld SOT-23 package offers an EN pin that
enables the device when pulled high. The enable threshold is
referenced to the GND terminal and has a level proportional to the
total supply voltage (reference Figure 9 for EN Threshold vs Supply
Voltage). The enable circuit has a delay time that changes as a
function of supply voltage. Figures 10 and 11 show the effect of
supply voltage on the enable and disable times. The enable and
disable delay is measured from the time the signal crosses the
enable threshold to the time the output reaches 20% of its final
value. For supply voltages less than 3V, it is recommended that the
user account for the increased enable/disable delay time.
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July 12, 2012
FN8343.0