ICL7106 Datasheet, PDF (8/16 Pages) Intersil Corporation – 3 1/2 Digit, LCD/LED Display, A/D Converters

ICL7106, ICL7107, ICL7107S
V+
V+
BP
ICL7106
DECIMAL
POINT
SELECT
TO LCD
DECIMAL
POINTS
TEST
CD4030
GND
FIGURE 6. EXCLUSIVE ‘OR’ GATE FOR DECIMAL POINT DRIVE
Digital Section
Figures 7 and 8 show the digital section for the ICL7106 and
ICL7107, respectively. In the ICL7106, an internal digital
ground is generated from a 6V Zener diode and a large
P-Channel source follower. This supply is made stiff to
absorb the relative large capacitive currents when the back
plane (BP) voltage is switched. The BP frequency is the
clock frequency divided by 800. For three readings/sec., this
is a 60Hz square wave with a nominal amplitude of 5V. The
segments are driven at the same frequency and amplitude
and are in phase with BP when OFF, but out of phase when
ON. In all cases negligible DC voltage exists across the
segments.
Figure 8 is the Digital Section of the ICL7107. It is identical to
the ICL7106 except that the regulated supply and back plane
drive have been eliminated and the segment drive has been
increased from 2mA to 8mA, typical for instrument size
common anode LED displays. Since the 1000 output (pin 19)
must sink current from two LED segments, it has twice the
drive capability or 16mA.
In both devices, the polarity indication is “on” for negative
analog inputs. If IN LO and IN HI are reversed, this indication
can be reversed also, if desired.
a
a
a
a
fb
f bf b
gc
g
g
b
ec
ec ec
d
d
d
BACKPLANE
21
LCD PHASE DRIVER
TYPICAL SEGMENT OUTPUT
V+
0.5mA
2mA
SEGMENT
OUTPUT
INTERNAL DIGITAL GROUND
1000’s
COUNTER
TO SWITCH DRIVERS
FROM COMPARATOR OUTPUT
CLOCK
†
† THREE INVERTERS
ONE INVERTER SHOWN FOR CLARITY
40
39
7
SEGMENT
DECODE
7
SEGMENT
DECODE
7
SEGMENT
DECODE
LATCH
100’s
10’s
1’s
COUNTER COUNTER COUNTER
÷4
LOGIC CONTROL
INTERNAL
DIGITAL
GROUND
38
V_TH = 1V
÷200
1
V+
6.2V
500Ω
TEST
37
26
V-
OSC 1
OSC 2
OSC 3
FIGURE 7. ICL7106 DIGITAL SECTION
8
FN3082.7