ISL8115 Datasheet, PDF (7/24 Pages) Intersil Corporation – High Voltage Synchronous Buck PWM Controller with Integrated Gate Driver and Current Sharing Capability

ISL8115
Functional Pin Descriptions (Continued)
PIN
NUMBER
12
13
14
15
16
17
18
19
20
21
22
23
24
25
SYMBOL
LGATE
ISENA
ISENB
VMON
RGND
FB
COMP
ISET
ISHARE
PLL_COMP
CONF
CLKOUT
SS
GND
DESCRIPTION
This pin provides the drive for the low-side devices and should be connected to the lower MOSFETs’ gates.
The positive input of the current sensing amplifier. Provide DCR, or precision resistor current sensing.
The negative input of the current sensing amplifier. Provide DCR, or precision resistor current sensing.
This pin monitors the regulator’s output for OV and UV protection. PGOOD refers to the voltage on VMON. Connect a resistor
divider from VOUT to RGND, with the same ratio as the FB resistor divider. It is not recommended to share the resistor divider
for both FB and VMON; the response to a fault may not be as quick or robust. The voltage on this pin is also monitored for
the non-linear control.
Pin for remote ground sensing. There’s a current sourcing out from RGND if ISET voltage is lower than ISHARE in the
multi-phase configuration. A typical 100Ω resistor is required connected between RGND and negative terminal of the load.
FB is the inverting input of the error amplifier. This pin is connected to the feedback resistor divider and provides the voltage
feedback signal for the controller.
This pin is the error amplifier’s output. It should be connected to the FB pin through a desired compensation network. The
lower limit of the voltage at COMP is 0.85V.
This pin sources a current equal to 5 times I_SEN with 50µA offset. Connect R_ISET to the pin to adjust the OCP trigger point.
Parallel C_ISET with R_ISET to obtain the average output current signal at this pin. The voltage V_ISET set by an external resistor
R_ISET represents the sensed current for the controller which compares with the internal reference to implement over current
protection. Refer to the ““Average Overcurrent Protection” on page 18.
This pin is used for current sharing purpose and is configured to the current share bus representing all module’s reference
current. The voltage V_ISHARE represents the highest voltage of V_ISET of all active ISL8115(s) that connected together to the
current share bus. Float in single phase operation. Pulling this pin low will disable the ISL8115.
Compensation pin for the internal PLL circuit. A compensation network shows in the typical application diagram is required.
R_PLL(5.11kΩ); C_PLL(2.2nF); C_{PLL_H} (390pF) are recommended.
A resistor at this pin is used to set: 1.) Enable or disable Diode emulation mode, and 2) Phase delay of clock out signal with
respect to input clock signal. See Table 1 for the resistor values.
This pin provides clock signal to synchronize with other ISL8115(s). The phase delay of the CLKOUT with respect to the
external clock signal is configured through CONF pin.
A resistor connected from this pin to ground is used to select the length of soft-start period. See Table 2 for the resistor
values.
All voltage levels are referenced to this pad. This pad provides a return path for the low side MOSFET drivers and internal
power circuitries as well as analog signals. Connect this pad to the board ground with the shortest possible path (9 vias to
the internal ground plane, placed on the soldering pad are recommended).
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART MARKING
TEMP RANGE
(°C)
PACKAGE
(Pb-free)
PKG.
DWG. #
ISL8115FRTZ
81 15FRTZ
-40 to +125
24 Ld Exposed Pad 4x4 TQFN
L24.4x4F
ISL8115EVAL1Z
12V to 1.5V/30A Evaluation Board
ISL8115EVAL2Z
28V to 5V/20A Evaluation Board
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-
free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL8115. For more information on MSL please see techbrief TB363.
7
FN8272.1
September 23, 2013