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ISL80138 Datasheet, PDF (7/9 Pages) Intersil Corporation – 40V, Low Quiescent Current, 150mA Linear Regulator
ISL80138
Functional Description
Functional Overview
The ISL80138 is a high performance, high voltage, low-dropout
regulator (LDO) with 150mA sourcing capability. The part is rated
to operate over the -40°C to +125°C temperature range.
Featuring ultra-low quiescent current, it is an ideal choice for
“always-on” applications. It works well under a “load dump
condition” where the input voltage could rise up to 40V. This LDO
device also features current limit and thermal shutdown
protection.
Enable Control
The ISL80138 has an enable pin, which turns the device on when
pulled high. When EN is low, the IC goes into shutdown mode and
draws less than 2µA. In “always-on” applications, EN can be tied
to IN.
Current Limit Protection
The ISL80138 has internal current limiting functionality to
protect the regulator during fault conditions. During current limit,
the output sources a fixed amount of current largely independent
of the output voltage. If the short or overload is removed from
VOUT, the output returns to normal voltage regulation mode.
Thermal Fault Protection
In the event that the die temperature exceeds a typical value of
+165°C, the output of the LDO will shut down until the die
temperature cools down to a typical +145°C. The level of power
dissipated, combined with the ambient temperature and the
thermal impedance of the package, determines if the junction
temperature exceeds the thermal shutdown temperature. See
the “Power Dissipation” section on page 7 for more details.
Application Information
Input and Output Capacitors
A minimum 0.1µF ceramic capacitor is recommended at the
input for proper operation. For the output, a ceramic capacitor
with a capacitance of 10µF is recommended for the ISL80138 to
maintain stability. The ground connection of the output capacitor
should be routed directly to the GND pin of the device and also
placed close to the IC.
Output Voltage Setting
The ISL80138 output voltage is programmed using an external
resistor divider as shown in Figure 11.
CIN
0.1µF
IN
OUT
R1
EN
ADJ
R2
GND
COUT
10µF
The output voltage is calculated using Equation 1:
VOUT
=
1.223 V
×
⎛
⎜
⎝
-R----1-
R2
+
⎞
1⎟
⎠
(EQ. 1)
Power Dissipation
The junction temperature must not exceed the range specified in
“Recommended Operating Conditions” on page 3. The power
dissipation can be calculated using Equation 2:
PD = (VIN – VOUT) × IOUT + VIN × IGND
(EQ. 2)
The maximum allowable junction temperature, TJ(MAX) and the
maximum expected ambient temperature, TA(MAX) will determine
the maximum allowable junction temperature rise (ΔTJ), as shown
in Equation 3:
ΔTJ = TJ(MAX) – TA(MAX)
(EQ. 3)
To calculate the maximum ambient operating temperature, use
the junction-to-ambient thermal resistance (θJA) as shown in
Equation 4:
TJ(MAX) = PD(MAX) x θJA + TA
(EQ. 4)
Board Layout Recommendations
A good PCB layout is important to achieve expected
performance. Consideration should be taken when placing the
components and routing the trace to minimize the ground
impedance and keep the parasitic inductance low. The input and
output capacitors should have a good ground connection and be
placed as close to the IC as possible. The feedback trace in the
adjustable version should be away from other noisy traces.
The 14 Ld HTSSOP package uses the copper area on the PCB as
a heat-sink. The EPAD of this package must be soldered to the
copper plane (GND plane) for effective heat dissipation.
Figure 12 shows a curve for θJA of the package for different
copper area sizes.
38
36
34
32
30
28
26
0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160
EPAD-MOUNT COPPER LAND AREA ON PCB, mm2
FIGURE 12. θJA vs EPAD-MOUNT COPPER LAND AREA ON PCB
FIGURE 11. OUTPUT VOLTAGE SETTING
7
FN7969.0
January 11, 2012