ISL6625A_14 Datasheet, PDF (7/10 Pages) Intersil Corporation – Synchronous Rectified Buck MOSFET Drivers

ISL6625A
.
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2 _20nC
Q_UGATE = 100nC
50nC
0.0
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
DV_{BOOT_CAP} (V)
FIGURE 3. BOOTSTRAP CAPACITANCE vs BOOT RIPPLE VOLTAGE
Power Dissipation
Package power dissipation is mainly a function of the switching
frequency (F_SW), the output drive impedance, the layout
resistance, and the selected MOSFET’s internal gate resistance
and total gate charge (Q_G). Calculating the power dissipation in the
driver for a desired application is critical to ensure safe operation.
Exceeding the maximum allowable power dissipation level may
push the IC beyond the maximum recommended operating
junction temperature. The DFN package is more suitable for high
frequency applications. See “Layout Considerations” on page 8
for thermal impedance improvement suggestions. The total gate
drive power losses due to the gate charge of MOSFETs and the
driver’s internal circuitry and their corresponding average driver
current can be estimated using Equations 2 and 3, respectively:
P_{Qg_TOT} = P_{Qg_Q1} + P_{Qg_Q2} + I_Q • VCC
P _{Q g _Q1}
=
Q_{-----G-----1----}•_-----U_----V_-----C_-----C_----²_--
V_GS1
•
F_S
W
•
N_Q
1
P_{Q g _Q2}
=
Q_{-----G-----2----}•_-----L_---V_-----C_-----C_----²_--
V_GS2
•
F_SW
•
N_Q2
(EQ. 2)
I_DR
=
⎛
⎜
⎝
Q_{-----G-----1----}•_-----U_----V_-----C_-----C_------•_----N_----Q-----1-
V_GS1
+
-^Q----^G-----²----^•-----^LV---^V--_G---^C-_S----^C₂------^•----^N----^Q-----²-_{⎠⎟⎞}
• F_SW + I_Q
(EQ. 3)
Where the gate charge (Q_G1 and Q_G2) is defined at a particular
gate to source voltage (V_GS1 and V_GS2) in the corresponding
MOSFET datasheet; I_Q is the driver’s total quiescent current with
no load at both drive outputs; N_Q1 and N_Q2 are number of upper
and lower MOSFETs, respectively; UVCC and LVCC are the drive
voltages for both upper and lower FETs, respectively. The I_Q*VCC
product is the quiescent power of the driver without a load.
The total gate drive power losses are dissipated among the
resistive components along the transition path, as outlined in
Equation 4. The drive resistance dissipates a portion of the total
gate drive power losses, the rest will be dissipated by the external
gate resistors (R_G1 and R_G2) and the internal gate resistors (R_GI1
and R_GI2) of MOSFETs. Figures 4 and 5 show the typical upper and
lower gate drives turn-on current paths.
P_DR = P_{DR_UP} + P_{DR_LOW} + I_Q • VCC
P _{D R _UP}
=
⎛
⎜
⎝
-------------^R-----^H----^I--¹--------------
R_HI1 + R_EXT1
+
-_R----_L---_O-----₁^R----+-^L---^O-_R----¹-_E----_X----_T---₁- _{⎠⎟⎞}
•
P_{-----Q----g----_--Q-----1-}
2
P _{D R _LOW}
=
⎛
⎜
⎝
-------------^R-----^H----^I--²--------------
R_HI2 + R_EXT2
+
R^-----_L^---_O^-----₂^{R----+-L---O-}R^----2-_E^----_X^----_T^---₂^- _{⎠⎟⎞}
•
P_{-----Q----g----_--Q-----2-}
2
R_EXT1
=
R_G
1
+
R_{-----G-----I-1--}
N_Q1
R_EXT2
=
R_G
2
+
R_{-----G-----I-2--}
N_Q2
(EQ. 4)
VCC
BOOT
D
R_HI1
R_LO1
PHASE
C_GD
G
R_G1
R_GI1
C_GS
S
C_DS
Q1
FIGURE 4. TYPICAL UPPER-GATE DRIVE TURN-ON PATH
LVCC
R_HI2
R_LO2
C_GD
G
R_G2
R_GI2
C_GS
S
D
C_DS
Q2
FIGURE 5. TYPICAL LOWER-GATE DRIVE TURN-ON PATH
7
FN7978.0
September 19, 2012