ISL54048 Datasheet, PDF (7/12 Pages) Intersil Corporation – Ultra Low ON-Resistance, +1.65V to +4.5V, Single Supply, Dual SPST Analog Switch

ISL54048, ISL54049
Test Circuits and Waveforms (Continued)
V+
C
SIGNAL
GENERATOR
NX1 OR NX2 _COM
50Ω
V+
C
NX1 OR NX2
IN₁
0V or V+
ANALYZER
R_L
COM
NX1 OR NX2
GND
N.C.
IMPEDANCE
ANALYZER
IN 0V or V+
COM
GND
Signal direction through switch is reversed, worst case values
are recorded. Repeat test for all switches.
FIGURE 5. CROSSTALK TEST CIRCUIT
Detailed Description
The ISL54048 and ISL54049 are bidirectional, dual single
pole/single throw (SPST) analog switches that offer precise
switching capability from a single 1.65V to 4.5V supply with
low on-resistance (0.29Ω) and high speed operation
(t_ON = 40ns, t_OFF = 20ns). The devices are especially well
suited for portable battery powered equipment due to their
low operating supply voltage (1.65V), low power
consumption (4.5µW max), low leakage currents (195nA max)
and the tiny µTQFN package. The ultra low ON-resistance
and r_ON flatness provide very low insertion loss and distortion
to applications that require signal reproduction.
Supply Sequencing and Overvoltage Protection
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents
which might permanently damage the IC. All I/O pins contain
ESD protection diodes from the pin to V+ and to GND (see
Figure 7). To prevent forward biasing these diodes, V+ must
be applied before any input signals, and the input signal
voltages must remain between V+ and GND.
If these conditions cannot be guaranteed, then precautions
must be implemented to prohibit the current and voltage at
the logic pin and signal pins from exceeding the maximum
ratings of the switch. The following two methods can be used
to provided additional protection to limit the current in the
event that the voltage at a signal pin or logic pin goes below
ground or above the V+ rail.
Logic inputs can be protected by adding a 1kΩ resistor in
series with the logic input (see Figure 7). The resistor limits
the input current below the threshold that produces
permanent damage, and the sub-microamp input current
produces an insignificant voltage drop during normal
operation.
Repeat test for all switches.
FIGURE 6. CAPACITANCE TEST CIRCUIT
This method is not acceptable for the signal path inputs.
Adding a series resistor to the switch input defeats the
purpose of using a low r_ON switch. Connecting schottky
diodes to the signal pins (as shown in Figure 7) will shunt the
fault current to the supply or to ground thereby protecting the
switch. These schottky diodes must be sized to handle the
expected fault current.
Power-Supply Considerations
The ISL54048 and ISL54049 construction is typical of most
single supply CMOS analog switches, in that they have two
supply pins: V+ and GND. V+ and GND drive the internal
CMOS switches and set their analog voltage limits. Unlike
switches with a 4V maximum supply voltage, the ISL54048
and ISL54049 4.7V maximum supply voltage provides plenty
of room for the 10% tolerance of 4.3V supplies, as well as
room for overshoot and noise spikes.
The minimum recommended supply voltage is 1.65V. It is
important to note that the input signal range, switching times,
and ON-resistance degrade at lower supply voltages. Refer
to “Electrical Specifications” on page 3 and the Typical
Performance Curves on page 8 for details.
OPTIONAL
SCHOTTKY
DIODE
OPTIONAL
PROTECTION
RESISTOR
V+
IN_X
V_NX
V_COM
OPTIONAL
SCHOTTKY
DIODE
GND
FIGURE 7. OVERVOLTAGE PROTECTION
7
FN6469.0
March 20, 2007