ISL43240 Datasheet, PDF (7/14 Pages) Intersil Corporation – Low-Voltage, Single and Dual Supply, Quad SPDT, High Performance Analog Switches

ISL43240
Test Circuits and Waveforms
3V
LOGIC
INPUT
0V
t_ON
50%
t_ON
t_r < 20ns
t_f < 20ns
V_NO
SWITCH
OUTPUT
V_NC
V_OUT
75%
25%
75%
25%
t_OFF
t_OFF
Logic input waveform is inverted for switches that have the opposite
logic sense.
C
V_NC ^C
V+
C
V_NO
NC
NO
SWITCH
INPUTS _IN
LOGIC
INPUT
GND
COM
C
V-
V_OUT
R_L
300Ω
C_L
35pF
Repeat test for all switches. C_L includes fixture and stray
capacitance.
V_OUT
=
V(NO _{or NC)}
------------^R-----^L-------------
R_L + R_(ON)
FIGURE 1A. MEASUREMENT POINTS
FIGURE 1. SWITCHING TIMES
FIGURE 1B. TEST CIRCUIT
V+
C
SWITCH
OUTPUT
V_OUT
LOGIC ^ON
INPUT
∆V_OUT
OFF
Q = ∆V_OUT x C_L
3V
ON
0V
R_G
COM
NO or NC
V_G
IN
GND
C
V-
LOGIC
INPUT
V_OUT
C_L
Logic input waveform is inverted for switches that have the opposite
logic sense.
Repeat test for all switches. C_L includes fixture and stray
capacitance.
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2B. TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
3V
LOGIC
INPUT
0V
SWITCH
OUTPUT
V_{OUT 0V}
80%
t_D
C
V_NX
LOGIC
INPUT
V+
C
NO
NC
IN
GND
COM
V_OUT
R_L
300Ω
C_L
35pF
Repeat test for all switches. C_L includes fixture and stray
capacitance.
FIGURE 3A. MEASUREMENT POINTS
FIGURE 3B. TEST CIRCUIT
FIGURE 3. BREAK-BEFORE-MAKE TIME
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