ISL4270E Datasheet, PDF (7/13 Pages) Intersil Corporation – QFN Packaged, ±15kV ESD Protected, +3V to +5.5V, 300nA, 250kbps, RS-232 Transceivers with Enhanced Automatic Powerdown and a Separate Logic Supply

ISL4270E
TABLE 2. POWERDOWN LOGIC TRUTH TABLE
RCVR OR XMTR
RS-232 LEVEL
EDGE WITHIN 30 FORCEOFF FORCEON TRANSMITTER RECEIVER PRESENT AT INVALID
SEC?
INPUT
INPUT
OUTPUTS OUTPUTS RECEIVER INPUT? OUTPUT
MODE OF OPERATION
NO
H
H
Active
Active
NO
L
Normal Operation (Enhanced
NO
H
H
Active
Active
YES
H
Auto Powerdown Disabled)
YES
YES
H
L
Active
Active
NO
H
L
Active
Active
YES
L
Normal Operation (Enhanced
H
Auto Powerdown Enabled)
NO
H
L
High-Z
Active
NO
L
Powerdown Due to Enhanced
NO
H
L
High-Z
Active
YES
H
Auto Powerdown Logic
X
L
X
High-Z
Active
NO
L
Manual Powerdown
X
L
X
High-Z
Active
YES
H
INVALID DRIVING FORCEON AND FORCEOFF (EMULATES AUTOMATIC POWERDOWN)
X
NOTE 5 NOTE 5
Active
Active
YES
H
Normal Operation
X
NOTE 5 NOTE 5
High-Z
Active
NO
L
Forced Auto Powerdown
NOTES:
5. Input is connected to INVALID Output.
PWR
MGT
LOGIC
FORCEOFF, FORCEON
INVALID
I/O CHIP
POWER SUPPLY
V_L ISL4270E
V_CC
CPU
I/O
UART
FIGURE 2. CONNECTIONS FOR MANUAL POWERDOWN
mode an RC time constant after this rising edge. The time
constant isn’t critical, because the ISL4270E remains
powered up for 30 seconds after the FORCEON falling edge,
even if there are no signal transitions. This gives slow-to-
wake systems (e.g., a mouse) plenty of time to start
transmitting, and as long as it starts transmitting within 30
seconds both systems remain enabled.
POWER
MANAGEMENT
UNIT
MASTER POWERDOWN LINE
0.1μF
1MΩ
FORCEOFF FORCEON
ISL4270E
FIGURE 3. CIRCUIT TO ENSURE IMMEDIATE POWER UP
WHEN EXITING FORCED POWERDOWN
V_L Logic Supply Input
Unlike other RS-232 interface devices where the CMOS
outputs swing between 0 and V_CC, the ISL4270E features a
separate logic supply input (V_L; 1.8V to 5V, regardless of
V_CC) that sets V_OH for the receiver and INVALID outputs.
Connecting V_L to a host logic supply lower than V_CC,
prevents the ISL4270E outputs from forward biasing the
input diodes of a logic device powered by that lower supply.
Connecting V_L to a logic supply greater than V_CC ensures
that the receiver and INVALID output levels are compatible
even with the CMOS input V_IH of AC, HC, and CD4000
devices. Note that the V_L supply current increases to 100μA
with V_L = 5V and V_CC = 3.3V (see Figure 16). V_L also
powers the transmitter and logic inputs, thereby setting their
switching thresholds to levels compatible with the logic
supply. This separate logic supply pin allows a great deal of
flexibility in interfacing to systems with different logic
supplies. If logic translation isn’t required, connect V_L to the
ISL4270E V_CC.
7
FN6041.2
June 16, 2010