ICM7211 Datasheet, PDF (7/12 Pages) Intersil Corporation – 4-Digit, ICM7211 (LCD) and ICM7212 (LED) Display Drivers

ICM7211, ICM7212
Input Definitions In this table, V_DD and V_SS are considered to be normal operating input logic levels. Actual input low and high levels are
specified under Operating Characteristics. For lowest power consumption, input signals should swing over the full supply.
INPUT
TERMINAL
CONDITIONS
FUNCTION
B0
B1
B2
B3
OSC (LCD Devices
Only)
27
V_DD = Logical One
Ones (Least Significant)
V_SS = Logical Zero
28
V_DD = Logical One
Twos
V_SS = Logical Zero
29
V_DD = Logical One
Fours
V_SS = Logical Zero
Data Input Bits
30
V_DD = Logical One
Eights (Most Significant)
V_SS = Logical Zero
36
Floating or with External Oscillator Input
Capacitor to V_DD
V_SS
Disables BP output devices, allowing segments to be synchronized to
an external signal input at the BP terminal (Pin 5).
ICM7211 Multiplexed-Binary Input Configuration
INPUT
TERMINAL
CONDITIONS
D1
31
V_DD = Inactive
D2
32
V_SS = Active
D3
33
D4
34
FUNCTION
D1 Digit Select (Least Significant)
D2 Digit Select
D3 Digit Select
D4 Digit Select (Most Significant)
ICM7211M/ICM7212M Microprocessor Interface Input Configuration
INPUT
DA1
DA2
CS1
CS2
DESCRIPTION
Digit Address
Bit 1 (LSB)
Digit Address
Bit 2 (MSB)
Chip Select 1
Chip Select 2
TERMINAL
31
32
CONDITIONS
V_DD = Logical One
V_SS = Logical Zero
V_DD = Logical One
V_SS = Logical Zero
33
V_DD = Inactive
V_SS = Active
34
V_DD = Inactive
V_SS = Active
FUNCTION
DA1 and DA2 serve as a 2-bit Digit Address Input
DA2, DA1 = 00 selects D4
DA2, DA1 = 01 selects D3
DA2, DA1 = 10 selects D2
DA2, DA1 = 11 selects D1
When both CS1 and CS2 are taken low, the data at the Data
and Digit Select code inputs are written into the input latches.
On the rising edge of either Chip Select, the data is decoded
and written into the output latches.
Timing Diagrams
DIGIT SELECT
D_N-1
DIGIT SELECT
D_N
t_IDS
t_WH
t_IDS
t_DH
CS1
(CS2)
CS2
(CS1)
DATA AND
DIGIT
ADDRESS
DATA VALID
D_N-1
DATA VALID
D_N
t_DS
FIGURE 1. MULTIPLEXED INPUT
t_WI
t_ICS
t_DH
t_DS
= DON’T CARE
FIGURE 2. MICROPROCESSOR INTERFACE INPUT
9-12