HI5746 Datasheet, PDF (7/17 Pages) Intersil Corporation – 10-Bit, 40 MSPS A/D Converter

Timing Waveforms
ANALOG
INPUT
HI5746
CLOCK
INPUT ^SN - 1 ^HN - 1 ^SN
H_N S_{N + 1} H_{N + 1} S_{N + 2}
S_{N + 5} H_{N + 5} S_{N + 6} H_{N + 6} S_{N + 7} H_{N + 7} S_{N + 8} H_{N + 8}
INPUT
S/H
1ST
STAGE
2ND
STAGE
B_{1, N - 1}
B_{1, N}
B_{1, N + 1}
B_{1, N + 4}
B_{1, N + 5}
B_{1, N + 6}
B_{1, N + 7}
B_{2, N - 2}
B_{2, N - 1}
B_{2, N}
B_{2, N + 4}
B_{2, N + 5}
B_{2, N + 6}
9TH
STAGE
B_{9, N - 5}
B_{9, N - 4}
B_{9, N}
B_{9, N + 1}
B_{9, N + 2}
B_{9, N + 3}
DATA
OUTPUT
D_{N - 7}
D_{N - 6}
D_{N - 2}
D_{N - 1}
D_N
D_{N + 1}
t_LAT
NOTES:
4. S_N: N-th sampling period.
5. H_N: N-th holding period.
6. B_{M, N}: M-th stage digital output corresponding to N-th sampled input.
7. D_N: Final data output corresponding to N-th sampled input.
FIGURE 1. HI5746 INTERNAL CIRCUIT TIMING
ANALOG
INPUT
CLOCK
INPUT
DATA
OUTPUT
1.5V
t_AP
t_AJ
1.5V
DATA N - 1
t_OD
t_H
2.4V
0.5V
DATA N
FIGURE 2. INPUT-TO OUTPUT TIMING
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