HI3246 Datasheet, PDF (7/16 Pages) Intersil Corporation – 8-Bit, 120MSPS, Flash A/D Converter

HI3246
Pin Descriptions (Continued)
PIN NO SYMBOL I/O
TYPICAL
VOLTAGE LEVEL
1
DV_EE3
GND (With a Single Power
Supply)
16, 17,
18
13
14
NC
CLK/E
CLK/NE
+5V (Typ) (With Dual Power
Supplies)
I PECL/ECL
I
48 RESETN/E I
47 RESET/E I
15
CLK/T
I TTL
46 RESETN/T I
44
INV
I TTL
EQUIVALENT CIRCUIT
DGND3
13 48
14 47
DV_EE3
DV_CC1
15 46
OR
44 , 45
DGND1
DV_EE3
DV_CC1
DESCRIPTION
Digital Power Supply. Apply -5V for
PECL and TTL input.
No Connect pin. Not connected with
the internal circuits.
Clock Input.
CLK/E Complementary Input. When
left open, this pin goes to the threshold
potential. Only CLK/E can be used for
operation, but complementary input is
recommended to attain fast and stable
operation.
Reset Input. When the input is set to
low level, the built-in CLK frequency
divider circuit can be reset.
RESETN/E Complementary Input.
When left open, this pin goes to the
threshold voltage. Only RESETN/E
can be used for operation.
Clock input.
Reset Input. When left open, this
input goes to high level. When the
input is set to low level, the built-in
CLK frequency divider circuit can be
reset.
1.5V
Data Output Polarity Inversion Input.
When left open, this input goes to high
level. (See Table 1; I/O
Correspondence Table).
44
45 SELECT
V_CC or Ground
DGND1
DV_EE3
DV_CC1
Data Output Mode Selection. (See
Table 2; Operating Mode Table).
45
DGND1
DV_EE3
7