HI3026A Datasheet, PDF (7/17 Pages) Intersil Corporation – 8-Bit, 140 MSPS, Flash A/D Converter

HI3026A
Pin Descriptions (Continued)
PIN NO SYMBOL
12
DGND3
1
DV_EE3
16, 17,
18
13
14
NC
CLK/E
CLKN/E
TYPICAL
VOLTAGE
I/O
LEVEL
+5V (Typ) (With a
Single Power
Supply)
GND (With Dual
Power Supplies)
GND (With a Single
Power Supply)
-5V (Typ) (With
Dual Power
Supplies)
EQUIVALENT CIRCUIT
I ECL/PECL
I
DGND3
13 48
14 47
RR
48 RESETN/E I
47 RESET/E I
15
CLK/T
I TTL
46 RESETN/T I
DV_EE3
DV_CC1
1.2V
RR
R/2
44
INV
I TTL
15 46
DGND1
DV_EE3
DV_CC1
R ^1.5V
DESCRIPTION
Digital Power Supply. Ground for ECL
input. +5V for PECL and TTL input.
Digital Power Supply. -5V for ECL input.
Ground for PECL and TTL Input
No Connect pin. Not connected with the
internal circuits.
Clock Input.
CLK/E Complementary Input. When left
open, this pin goes to the threshold
potential. Only CLK/E can be used for
operation, but complementary input is
recommended to attain fast and stable
operation.
Reset Input. When the input is set to low
level, the built-in CLK frequency divider
circuit can be reset.
RESETN/E Complementary Input. When left
open, this pin goes to the threshold voltage.
Only RESETN/E can be used for operation.
Clock Input.
Reset Input. When left open, this input
goes to high level. When the input is set to
low level, the built-in CLK frequency divider
circuit can be reset.
Data Output Polarity Inversion Input. When
left open, this input goes to high level. (See
Table 1, I/O Correspondence Table.)
44
DGND1
DV_EE3
4-1384