DG411_07 Datasheet, PDF (7/13 Pages) Intersil Corporation – Monolithic Quad SPST, CMOS Analog Switches

DG411, DG412, DG413
Test Circuits and Waveforms (Continued)
V+
R_G
D₁
V_O
SWITCH
OUTPUT
ΔV_O
IN_X
OFF
ON
OFF
V_G
C_L
GND
V-
V_IN = 3V
FIGURE 3A. TEST CIRCUIT
OFF
IN_X
ON
Q = ΔV_O x C_L
OFF
NOTE: IN_X dependent on switch configuration, input polarity
determined by sense of switch.
FIGURE 3B. MEASUREMENT POINTS
FIGURE 3. CHARGE INJECTION
+15V
C V+
SIGNAL
GENERATOR 0dBm
V_S
V_D
50Ω
0V, 2.4V
ANALYZER
R_L
IN₁
IN₂
0V, 2.4V
V_D
NC
C
V-
GND
-15V
FIGURE 4. CROSSTALK TEST CIRCUIT
+15V
C V+
SIGNAL
GENERATOR 0dBm
V_S
ANALYZER
R_L
IN_X
0V, 2.4V
V_D
C
GND ^V-
-15V
FIGURE 5. OFF ISOLATION TEST CIRCUIT
+15V
C V+
V_S
IMPEDANCE
ANALYZER
f = 1MHz
IN_X 0V, 2.4V
V_D
C
GND
V-
-15V
FIGURE 6. SOURCE/DRAIN CAPACITANCES TEST CIRCUIT
7
FN3282.13
June 20, 2007