CD40181BMS Datasheet, PDF (7/10 Pages) Intersil Corporation – CMOS 4 Bit Arithmetic Logic Unit

Logic Diagram
3*
S3
4*
S2
5*
S1
6*
S0
18*
B3
19*
A3
20*
B2
21*
A2
22*
B1
23*
A1
1*
B0
2*
A0
8*
M
7*
n
CD40181BMS
17
G
16
Cn+4
15
P
13
F3
11
F2
14
A=B
10
F1
* ^{ALL INPUTS ARE PROTECTED}
BY CMOS PROTECTION
NETWORK
FIGURE 1. ACTIVE LOW DATA
7-1406
9
F0
VDD
VSS